Philips 32PFL3506/F7 - Page 44

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4. Digital Signal Process Block Diagram
DIGITAL MAIN CBA UNIT
IC3005 (DIGITAL SIGNAL PROCESS)
IC3018 (HDMI SW)
IC3011 (EEPROM)
CN3005
LLV1(+)21 LLV1(-)20 LLV0(+)23 LLV0(-)22 LLV2(+)19 LLV2(-)18 LLV3(+)13 LLV3(-)12 LLV4(+)11 LLV4(-)10 LLV5(+)9 LLV5(-)8 LLVCLK(+)16 LLVCLK(-)15 TP6 POL5 CPV4 OE13 STV1
P14
P13
N16
N15
P16
P15
T16
R14 R13
T13 T14
T15
R16
R15
L13
M15
L16 L15
M14
B4 A4 B3 A3 B2 A2 B1 A1
LVDS TX
DIGITAL SIGNAL PROCESS
A/D CONVERTER
S-VIDEO-Y-IN
SW
D8
B11
C9
S-VIDEO-C-IN
A10
C10
VIDEO-IN
C8
COM-VIDEO-Pr-IN COM-VIDEO-Pb-IN
COM-VIDEO-Y-IN
B9
IF-AGC
HDMI-IN1 HDMI-IN2
SCL
SDA
JK3003
TMDS-D0(+) TMDS-D0(-) TMDS-D1(+) TMDS-D1(-) TMDS-D2(+) TMDS-D2(-) HDMI-DATA HDMI-CLOCK
7 42
41 45 44 48 47 39 38 36 37
26 27 23 24 20 21 17 18
57 56 60 59 63 62 54 53 51 52
2 3
7 6
15 14
10 11
9 4 6 1 3
10 12 16 15
7 9 4 6 1 3
10 12 16 15
JK3004
TMDS-D0(+) TMDS-D0(-) TMDS-D1(+) TMDS-D1(-) TMDS-D2(+) TMDS-D2(-) TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI-DATA
SDA1
HDMI-CLOCK
SCL1 SDA2 SCL2
SDA3
SCL3
SDA0
SCL0
HDMI-IN3
7 9 4 6 1 3
10 12 16 15
JK3002
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
TMDS-CLOCK(+)
TMDS-CLOCK(-)
HDMI-DATA
HDMI-CLOCK
TMDS-CLOCK(+) TMDS-CLOCK(-)
DEMODULATOR /MPEG DECODER
A12 A16
AUDIO I/F
TO AUDIO BLOCK DIAGRAM
AMP
(R)-OUT
AMP(L)-OUT SPDIF
A7
N10
B7
DATA(0-15) ADDRESS(0-12)
IC3002
N4,N7,N8,P3,P4,P6-P8, R3,R4,R6,R8,T2-T5 H1,H2,J1,J2,J4,K1,K3, L1,L2,M1-M3,N1
B1,B9,C2,C8,
D1,D3,D7,D9,
F1,F9,G2,G8,
H1,H3,H7,H9
M2,M3,M7,M8, N2,N3,N7,N8, P2,P3,P7,P8,R2
(DDR2 SDRAM)
HDMI SW
AUDIO DECODER
HDMI I/F
DIF-OUT1 DIF-OUT2 IF-AGC
TO VIDEO BLOCK DIAGRAM
VIDEO DECODER
B12
S-VIDEO-SW
N12
S-VIDEO-SW
B8
AUDIO(R)
A8
AUDIO(L)
AUDIO(R)-OUT AUDIO(L)-OUT
A6 B6
VIDEO SIGNAL
AUDIO SIGNAL
TP
POL
CPV
OE
STV
LCD MODULE ASSEMBLY
8 7
11 10 14 13
5 4 1 2
TO SYSTEM CONTROL BLOCK DIAGRAM
PL11.0BBLD