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Philips 40PFL7605H/12 - Page 59

Philips 40PFL7605H/12
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Circuit Descriptions
EN 59Q552.1E LA 7.
2010-Feb-19
back to
div. table
Notes to figure 7-26 TCON block diagram:
LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
ODC: Over Drive Circuit - to improve LC response
Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data
Timing Control Function: generates control signals to
column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-27 TCON DC/DC converters
.
Figure 7-27 TCON DC/DC converters
7.10.1 TCON Programming
For LGD - TCONs, the EEPROM can be programmed via
ComPair (via I
2
C communication).
For Sharp - TCONs, the data can be flashed with a “SPI
Programmer” (via SPI communication). This device has to be
ordered separately.
7.10.2 TCON Alignment
The purpose of TCON alignment is to obtain equal voltages for
both positive and negative LC polarity. This is to avoid “flicker”
and “image sticking”.
The alignment value for the TCON is stored in the main
software and is automatically set to the correct value when you
enter the display code via the service menu. No manual
alignment is needed.
18770_240_100128.eps
100128
DC/DC
Controller
+12V
LGD
SHP
Where Used
VGH
+28 V
+3 5V
To Gate D rivers (G ate
Hig h Voltag e)
VGL
-6 V
-6 V
To Gate D rivers (G ate
Low Voltage)
Vcc
+3 V 3
+3 V 3
Timing Controller IC
S upply Voltage
Vcc
+1V8
+1V2
Timing Controller IC
S upply Voltage
Vref
+16V
+15V2
Gamma Reference
Voltag e
Vdd
+16V
+15V6
S ource Driver S upply
Voltag e

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