Philips 9000 series - Connect Devices

Circuit Descriptions
EN 56 Q551.1E LA7.
2010-Jun-25
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Figure 7-36 TCON block diagram
Notes to figure 7-36 TCON block diagram
:
• LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
• ODC: Over Drive Circuit - to improve LC response
• Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data
• Timing Control Function: generates control signals to
column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-37 TCON DC/DC converters
.
Figure 7-37 TCON DC/DC converters
18770_239_100127.eps
100127
LVDS
Receiver
LVDS
Receiver
Vertical & Horizontal
Timing g eneration
Data
Path
Block
(Line
Buffer)
M ini-LVDS
Transmitter
M ini-LVDS
Transmitter
OPC
(Optimum
Power
Control)
(Over
Drive
Circuit)
(Dynamic
Contrast
Control)
ODC DCA
Form atter/S erializer
S pread
S pectrum
S DRAM
I
2
C
Slave
I
2
C
Master
ROM
EEPROM
16 bit
H
sync
/
V
sync
DE
SS
CLK
(S pread Spectrum C lo ck)
RLV P /N
Right h alf
data
Gate Driver
Ctrl S ig nals
Source D river
Ctrl S ig nals
R1A~E
R1CLK
R2CLK
R2A~E
Mini-
LVDS
Output
LVDS
Input
Control
Signal
Output
Timing Controller IC
18770_240_100128.eps
100128
DC/DC
Controller
+12V
LGD
SHP
Where Used
VGH
+28 V
+3 5V
To Gate D rivers (Gate
Hig h Voltag e)
VGL
-6 V
-6 V
To Gate D rivers (Gate
Low Voltage)
Vcc
+3 V 3
+3 V 3
Timing Controller IC
S upply Voltag e
Vcc
+1V8
+1V2
Timing Controller IC
S upply Voltag e
Vref
+16V
+15V2
Gamma Reference
Voltag e
Vdd
+16V
+15V6
S ource Driver S upply
Voltag e