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PIN DESCRIPTION OF INTEGRATED CIRCUITS
MN662786SB – SIGNAL PROCESSING IC
Pin Name I/O Description
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1 DRVDD I Power supply for DRAM interface (Pin 2 to 19,and 80)
2D0 I/O DRAM data I/O signal 0
3 D1 I/O DRAM data I/O signal 1
4 NWE O DRAM write enable signal
5 NRAS O DRAM RAS control signal
6D2 I/O DRAM data I/O signal 2
7D3 I/O DRAM data I/O signal 3
8 NCAS0 O DRAM CAS control signal 0
9 NCAS1 O DRAM CAS control signal 1
10 A8 O DRAM adress signal 8
11 A7 O DRAM adress signal 7
12 A6 O DRAM adress signal 6
13 A5 O DRAM adress signal 5
14 A4 O DRAM adress signal 4
15 A9 O DRAM adress signal 9
16 A0 O DRAM adress signal 0
17 A1 O DRAM adress signal 1
18 A2 O DRAM adress signal 2
19 A3 O DRAM adress signal 3
20 DVSS2 I Ground for digital circuits
21 DVDD2 I Power supply for digital circuits
22 SPOUT O Spindle motor drive dignal output (Absolute value output)
23 TRVP O Traverse drive output (+side output)
24 TRVM O Traverse drive output (-side output)
25 TRP O Traverse drive output (+side output)
26 TRM O Traverse drive output (-side output)
27 FOP O Focus drive output (+side output)
28 FOM O Focus drive output (-side output)
29 IOV
DD1 I I/O power supply
30 TBAL O Tracking balance adjustment output
31 FBAL O Focus balance adjustment output
32 FE I Focus error signal input (Analog input)
33 TE I Tracking error signal input (Analog input)
34 RFENV I RF envelope signal input (Analog input)
35 OFT I Off-track signal input H: Off track
36 NRFDET I RF detection signal input L: Detect
37 BDO I Dropout signal input H: Dropout
38 LDON O Laser ON signal output H: ON
39 ARF I RF signal input
40 I
REF I Reference current input
41 ADPV
CC I A/D converter reference voltage input (Analog input)
42 DSLF O DSL loop filter
43 DRF I DSL bias
44 PLLF O PLL loop filte
45 VCOF O Jitter-free VCO loop filter
46 AVDD2 I Power supply for analog circuits (For DSL,PLL,VCOF,A/Dconverter,and D/A converter)
47 AV
SS2 I Ground for analog circuits (For DSL,PLL,VCOF,A/Dconverter,and D/A converter
48 OUTL O L-ch audio output
49 AVSS1 I Ground for analog circuit (For audio output stage)
50 OUTR O R-ch audio output
51 AV
DD1 I Power supply for analog circuits (For audio output stage)
52 FSEL I Noise filter for microcontroller interface ON/OFF selection input L:ON H:OFF
53 TMOD1 I Test input pin Normal:
54 TMOD2 I Test input pin Normal: L
55 *FLAG O Flag signal output
56 *IPFLAG O Interpolation flag signal output H:Interpolation
57 *EXT0 I/O Expansion I/O port 0
58 *EXT1 I/O Expansion I/O port 1
59 IOV
DD2 I I/O power supply
60 TX O Digital audio interface signal output
61 MCLK I Microcontroller command clock signal input (Latches the data at a rising edge)
62 MDATA I Microcontroller command data signal input
63 MLD I Microcontroller command load signal input L:Load
64 *BLKCK O Subcode block clock signal output f=75 Hz (Normal-speed playback)
65 PWMSEL I/O PWM output mode seletion input L: Direct H: 3-state
66 SMCK O 4.236-MHz/8.4672-MHz clock signal output
67 DMUTE I/O Muting input H: Mute
68 STAT O Status signal output
69 NRST I Reset input L:Reset