Philips CDI 220/31 - Page 18

ITEM4:
DRAM
The dram test is always a destructive test. The test is per-
formed for both ram
CHIP!
and CHIP2
as
one
large mem-
ory followed
by
a test for each bank separately.
The following actions take place in the
dram
test
1.
fill the memory with the long word address as data.
2.
read the memory contents and compare with the
address.
3.
if the long word read is ok then continue else give
error message and stop testing.
4.
write the inverted long word address
as
data to
memory.
5.
read the memory contents and compare with the
inverted address.
6.
if the long word read is
ok
then continue else give
error message and stop testing.
This test
has
also some hidden functions. Pressing :
w : writes continu the long address
as
data to the
dram.
r:
reads continu the dram (no display).
d : displays the contents of
421
succeeding ram
locations. The start address is given by the user.
ESC stops these functions.
Remark :
The
error message is different from the pcb lltest.
See
error table for more information.
ITEM
5:
CDIC
The cdic test consists out of three main parts:
1.
test cdic ram with long word address
as
pattern
2.
test cdic ram with inverted long word address as
pattern
3.
display cdic register and compare
Jf
in
one
of these
tests an error occurs the test will be stopped and
the error displayed.
ITEM
6:
SLAVE
processor
(68HC05)
This Illes! for the slave performs following actions:
1.
Write
$FO
to the slave processor.
2. Read byte from same address, the slave should
respond with
$FO.
3.
If data is not
$FO
then stop testing and display error
code else continue with next action.
4.
Read the next byte: this byte is the release number
of
the
slave processor firmware.
Display the release number.
If
the release number
is
$00
then an error will be displayed.
5.
Read the next byte: this byte is the release number
of
the CD processor firmware. Display the release
number. If the release number is $00 then an error
will
be
displayed.
6.
Read the next byte: this is a dummy read.
PCS 67 643
ITEM
7:
CLOCK CALIBRATION
This step is not really a test.
It
is a software tool that can be
used to trim the clock&calendar chip so that it runs within 1
minute acc. per month.
If
calibration is not needed, this step
should be executed since a frequency counter is needed to
complete this test successfully. If this test is entered
accidently, just switch off the
power
and restart the lltest.
The clock calibration should be performed with an external
frequency counter.
- Connect the probe of the counter to pin34 of IC7304
(CSCDICN).
- Start the test with the gate time of the frequency counter
set to minimum
5
sec.
- The counter display should
now
show a frequency near to
512Hz.
Jf
not, the chek if everything is set and connected
properly. (range : 511,96724 to 512,03276)
- Press a key on the terminal to stop the measurement.
Now fill in the measured value of the frequency. The lltest
software will now calculate the proper value to be filled
into the calibration register of the clock&calendar IC. The
value of the frequency
at
pin34 of IC7304 will not
be
changed or influenced.
The calibration is done now.
ITEM
8 : A TTEX test
This step is only intended to be used with an oscilloscope.
The software will generate a pattern on some A TTEX pins.
These pins and their signals are described below.
It
is not
guaranteed that this test always runs.
If
one of the devices
connected to the ATTEX is defective ( no
DTACK)
it
will
surely result in a hang-up of the testsoftware.
Within this test the following selections can
be
made:
0. Exit A TTEX menu
Exit the menu for ATTEX test and go back to main menu.
1
. Generate full range VDSC-cs
Generate Chip Selects in the Complete VDSC address
range.
Addres range : $000000 - $47FFFF
2. Generate full range CIDIC-cs
Generate Chip Selects in the Complete CIDIC address
range.
Range : CIDIC base address - (CIDIC base address
+
$FFFF)
3. Generate full range Slave-cs
Generate Chip Selects in the Complete slave processor
address range.
Range
:
Slave base address - (Slave base address
+
$7777).
4. Generate full range NVRAM-cs
Generate Chip Selects in the complete NVRAM address
range.
Range : NVRAM base address - (NVRAM base address
+
$1FFFF)