6.2.1
Alphabetical
signal
listing
A,B,C
+
A,B,C •
ACK2N
ACM
ADEN
AM
ASN
AUDL
AUDIOL
AUDR
AUDIOR
AVN
B0
..
3
B,G,R,
BERAN
BEAR
BLANI
CADDYIN
CADDYSWITCH
CASN
CBA,CBAA
CDICDACKN
CDICREON
CDTV
CLAB
CLK
CLKDAC
CLK1
CRI
coc
COXN
CPUASN
CPULDSN
CPUUDSN
cs
CSCDICN
CSDAC1N
CSNVRAMN
CSROMN
CSROM1N
CSROM2N
CSSLAVEN
CSON
CSVSCMSN
: > >
control
signals
for
brushless
DC-motor
:>>
:
DMA
REQUEST ACKNOWLEDGE (active
low)
(of
channel
2)
:
output
AC-motor
:
(~ADENA)
ADDRESS ENABLE
NOT.
When
low,the
address ADENA
coming
from
the bus (68070)
will
be
put
through
to CDIC
: ADDITIONAL MUTE
: ADDRESS STROBE (active low,tristate)
indicates
when
an address
is
valid
on
the
bus
for
the system
: >
>
AUDIO LEFT
:>>
: > >
AUDIO RIGHT
:>>
: AUTOVECTORED INTERRUPTS (active
low),can
be used by an extension
:
input
control
bits
for
off-, catch-, play
status and DAC
output
current
for
radial
motor
:
Output
colours
of
the
VSR
: > >
BUS
ERROR
(active low,open
drain)
:>>
:
(~BLAN1
M) BLANKING OUTPUT (active
low,tristate)of
the
VSC
: high
when
reading data
:
control
signal
for
position tray
: COLUMN ADDRESS STROBE (active
low)
: 68070 bus transiever latch (rising edge)
:
(~ACK1
N)
DMA
REQUEST
ACKNOWLEDGE (active low)
: (-REQ1
N)
DMA
REQUEST (active low)
:
to
change
by
remote
control
between
TV
or
CDI
(only used
by
CDI
2XX)
:
(~CLAB2)
bitclock
for
the
SAA
7220
chip
: CLOCK (11,2896 Mc)
:
CLOCK
DAC,the clock used
to
send
serial data to the
volume
adjustment
: the clock on
which
the
DSP
operates
(7,5264 Mc)
: COUNTER RESET INHIBIT
(low
during
a real trackloss
or
during
excention
of
a
jump
command
:
COMMAND
COMPLETED signal
: serial
output
clock
for
the X-bus
: the address strobe
of
the 68070
microprocessor
: the
lower
data strobe
of
the 68070
microprocessor
: the
upper
data strobe
of
the 68070
microprocessor
:
CHIP
SELECT
:
·::HIP
SELECT
CDIC
(active low) bus
information
is intended
for
or
coming
from
CDIC
: (~CSDAC2N)
(if selected,low) it means
that
data
will
be adjusted on
that
channel
:
CHIP
SELECT NVRAM (active low) bus
information
is
intended
for
or
coming
from
the
NVRAM
:>>
:
CHIP
SELECT ROM (active low) bus
information
is
coming
from
the ROM'S
:>>
: CHIP SELECT SLAVES (active low)
:
(~CSONA)
CHIP
SELECT (active low) for
the 8Kx8 SRAM'S
:
CHIP SELECT
VSC
MASTER AND
SLAVE.
When
low
the
coming
information
is intended
for
the VSC'S