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Philips PM 3266 - Page 128

Philips PM 3266
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133
timer
(R2276,
V2266,
D221 3-3,2
and C2244).
The
timer
output
gives
a low
voltage
after
a delay
of 100
ms;
i.e.
at 1600
ms. This
pulse
is fed
via
emitter-follower
V2232
and resistor
R2287
to
unblock the
time-base.
The output from
V2232
and diode
V2267
controls
the
Z-amplifier.
After
the time-base
sweep,
500 V, 100
ms
transfer
pulse is
fed
to the front
mesh.
This
image transfer
pulse
is
derived from
the
Q output of
flip-flop
D2229-13.
The
clock
input on pin 1 1 is
fed
from
a
differentiated
pulse
produced
from the
low-to-high
voltage
translator
D2223 {see
ETB,
BTB
pulse
generator). The
Q output
of
D2229-13
produces
a 100
ms pulse
because
of the delay
circuit
R2302,
V2228,
D2228,
C2238 coupled
back
to the
clear
input, D2229-10.
This
pulse
is
fed
from D2228-1
5 to input
6 of NAND gates
D2207.
Together
with
the
FAST
pulse
on D2207-5,
a
negative-going
pulse is
produced
that
is fed
to the clear
input of
flip-flop
D2208-4.
As
a
result,
the
first
section of
the
timer gives
a 100
ms pulse from
D2211-10, via V2226,
to R2486
on
the
input
of the front
mesh
amplifier.
As described
for
the first
erase pulse,
a 500 V,
100
ms transfer
pulse is
applied to
the front
mesh.
At the same
time
as this transfer
pulse, the
Q output
pulse from
D2229-13
is
also
fed to the
control
input 5
of
D2402,
which
switches a -HI
.2
V on input
3,
via
output 4 and
preset
R241
2 to limit
the conduction
of V2402.
This slightly
reduces
the
-t5
V level
on the fast
mesh
during the transfer
pulse.
STORE
MODE
See Fig.
3.16.
for voltage waveforms.
When the
STORE
pushbutton
(S24A) is depressed
a logic 0 is
applied
to the input
of inverter
D2202-1
1
(and
to the
input of AND
gate
D2201-1
1 )
of the pushbutton
switch decoder
to give
a logic 1
on output
D2202-1 2.
This
is applied
to the input of
AND
gate D2201-8.
With the FAST
and WRITE
pushbuttons
not selected, the
input conditions
of AND
gates D2201/3,4,5,6,
and
D2201/1
1,12,13,10 are such
that their outputs
are at
logic 0. Logic zeros are
therefore
applied
to inputs 12
and 13 of flip-flop
D2204. Input
4
of D2204 is also
at logic
0
because
input 1 of AND
gate D2201 is
at logic 0.
However,
since outputs
4,
6 and 10 of inverters D2202
are
at
logic
1,
then diodes
V2201,
V2202 and V2203
are non-conducting
and the
combined input on pin
5 of flip-flop
D2204 is at logic 1.
This
decoded input to
D2204 gives
a STORE signal
(logic
1)
on output pin
7,
which
is used to control the
storage logic
circuits in
the STORE mode.
In this mode,
the flood gun accelerator anode is
pulsed by a
100
Hz
square wave derived from
the
dual
oscillator formed
by amplifier
D2222. This produces a triangle input
to
amplifier
D2221-10.
The negative
input
on D2221-9
is
supplied with a variable d.c. input from the INTENS control
(R14)
via operation amplifier
02221/12,13,14.
In this way,
a square wave
output is produced on D2221-8, the
duty
cycle of which can be
varied
by
the INTENS
control between 0 and 80 %. This waveform is
inverted by
D221
7/9,10
and applied
to
the
input of AND gate D2209-5.
Together with the STORE pulse on input
6,
this
produces an output on pin
4
to the control input of transmission
gate
D240T6.
In
this way, the
-H
1.2 V input on pin 9 is pulsed via pin 8 and
R2402,
to the input of the
flood gun
amplifier.
The
base
of
V2437, normally
at a small positive
potential
(at
20
V output) is driven
more positive by the
-H 1.2
V input pulses and V2437 is blocked during these
pulses.
Transistor
V2438 conducts
further as
a
result and drives the base of
V2242 positive. This
transistor
conducts further and
the
resulting
negative-going
collector
cuts off output transistor V2439.
As
a
result,
its
emitter
drops to O V during the -H 1.2
V
pulses from D2401-9.
The output
on the flood gun
accelerator
via R2504 consists of
+20
V pulses with a duty
cycle of
0-80%
depending
on
the
setting of
the
INTENS
control.
During the STORE mode, the front mesh has
a
voltage that lies between
—5
V and -H
5 V. This level is controlled
by
a logic 0 that is present on the output of
AND
gate D2224-6
(WRITE input
0). This logic 0 output,
via
V2234, produces a logic 1 on the output of inverter D2228/5,4, which is routed to the control input D2403-12.
This
connects a
+
1 1.2 V supply from pin
10,
via preset
R2577,
to the input
of the front
mesh
preamplifier to
give
the store
level between
5V and
+
1 5
V on
the front
mesh,
G12.
Fast
Mesh
The fast mesh is held at -H40
V
in
the STORE mode. Output
transistor
V2404 of the fast
mesh
amplifier
is
held conducting because the base of the input transistor V2402 is held
at approximately
-t5.4
V by the
feedback
via R2454.
No preparatory or transfer
pulses are received in this mode to
turn
off V2402, therefore the output to the
fast mesh remains at -H40 V.

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