Samsung PS42C7HX/XEC - 7-1 Overall Block Diagram

Block Diagram
Samsung Electronics 7-1
7. Block Diagram
7-1 Overall Block Diagram
1024× 768 Pixels
1024× 3× 768 Cells
YPulse
Generator
Row
Driver
VsVa
Vcc
Vsync
Enable
Hsync
DCLK
DRAM
Display
Data
Driver
Timing Controller
Driver
Timing
Scan
Timing
3V3
DATA_R
8Bits
Column Driver
Reference
-3V3 : Voltage for Logic Control
-Vcc : Voltage for FETdriver
-Va : Voltage for address pulse
-Vs : Voltage for sustain pulse
-Vsc : Voltage for scan pulse
-Ve : Voltage for X ramp pulse
-Vset : Voltage for Y ramp pulse
LOGIC CONTROL
DRIVER CIRCUIT & PANEL
DATA_G
8Bits
DATA_B
8Bits
Input Data Processor
Data Controller
XPulse
Generator
Vset Vsc
Ve
LVDS
Interface
VSYNC
DEN
DCLK
R-Data
8,10,12 or 13Bits
G-Data
8,10.12 or 13Bits
B-Data
8,10,12 or 13Bits
HSYNC
Micom
Image Scaler +
Video Decoder