Samsung PS42C7HX/XEC - Page 52

Block Diagram
Samsung Electronics 7-5
7-2-4 Logic Board Block Diagram
CONTROL
SIGNAL
50 Pin Connector FM75
30 Pin Connector 20 Pin Connector
50 Pin Connector
10 Pin (Power)31 Pin LVDS
SPS-NIRB
(ASIC 816P)
DDRDRIVE
RESET
(FA)
DDR
(MA)
DDR
(MB)
R,G,B : 24bit
CLK 1, 2
BLK, POC, STB
CSE, CE1, CE2
R,G,B : 24bit
CLK 1, 2
BLK, POC, STB
CSE, CE1, CE2
DATA : 32bit
ADDR : 12bit
DQS, CLK, nCLK
RELAY_EINT
Vs-ON
X-MAIN
CONTROL
SIGNAL
Y-MAIN
CONTROL
SIGNAL
LVDS SIGNAL
(8~12bit)
TX, RX
ASIC
nRESET
5 Pin (uart)
MICOM
7-2-5 Power Block Diagram