Samsung SENS R60 Plus - Page 24

Samsung
Confidential
0
1
CPU
FSA
A
Compatible Components
0
BSEL1
PROPRIETARY INFORMATION THAT IS
Route all CLK1 signal as different pair rule
HOST CLK
A
166 MHz1
SAMSUNG
Place all te serias termination resistor as close as Clock Chip as possible
C
0
4
FSC
0
1
Yonah 667MHz
1
Celeron 533MHz
EXCEPT AS AUTHORIZED BY SAMSUNG.
1
SAMSUNG ELECTRONICS CO’S PROPERTY.
0
3
1
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG PROPRIETARY
200 MHz1
Vil_fs_max - 0.35V
0
4
1
ELECTRONICS
266 MHz
1
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
0
D
133 MHz
BSEL2
1
1
B
1
100 MHz
2
0
FSA, FSB, FSC of Clock chip are low thershold inputs
FSB
0
0
C
RSVD
Pt decoupling CAPS close to Clock Chip power pin
333 MHz
1
3
01
Change to Low cost cap
0
BSEL0
B
Vih_fs_min = 0.7V
2
D
400 MHz
Silego : SLG84610
C716
100nF
R740
13-B3
B521
BLM18PG181SN1
9-C4
33
1%
R647
49.9
R749
33
6.3V
10000nF
C717
49.9
R738
1%
C785
100nF
49.9
R746
1%
C788
0.022nF
R741
33
1%
R742
49.9
33
R744
35-C4
9-B2 20-A4 20-C3 54-B3
33
R652
C869
0.022nF
R733
33
15-B4
R644
33
0
R753
33
R745
33
R695
R637
49.9
9-D4
33-C4
33-C4
1%
TP18453TP18378
13-B3
TP18452
1%
R643
49.9
2.2K
R694
R651
33
TP18455
TP18456
10V
C787
100nF
TP18379TP18454
20-C320-A417-B4 33-C4
35-C2 54-D2
17-B2
19-D4
B515
R735
33
19-D4
BLM18PG181SN1
R642
33
2.2K
R693
9-C4
54-C4 15-B4
54-C4 20-C3
35-C4
1%
R654
49.9 49.9
R653
1%
2.2K
R650
R737
33
10000nF
6.3V
VDD_48
4
39
VDD_ATIG
1
VDD_REF
44
VDD_SRC1
VDD_SRC2
28
23
VDD_SRC3
14
VDD_SRC4
8
VTTPWRGD*_PD
X1
2
3
X2
C715
27
SRCCLKC2
SRCCLKC3
25
21
SRCCLKC4
SRCCLKC5
19
17
SRCCLKC6
SRCCLKC7
13
47
SRCCLKT0
30
SRCCLKT1
SRCCLKT2
26
24
SRCCLKT3
SRCCLKT4
20
18
SRCCLKT5
SRCCLKT6
16
SRCCLKT7
12
VDDA
5056
VDDCPU
61
FSLC_REF2
GNDA
49
7
GND_48
38
GND_ATIG
GND_CPU
55
64
GND_REF
45
GND_SRC1
29
GND_SRC2
22
GND_SRC3
15
GND_SRC4
48
IREF
60
RESET_IN*
9
SMBCLK
10
SMBDAT
SRCCLKC0
46
SRCCLKC1
31
43
ATIGCLKT0
41
ATIGCLKT1
37
ATIGCLKT2
35
ATIGCLKT3
CLKREQA*
11
32
CLKREQB*
CLKREQC*
33
CPUC0
57
53
CPUC1
CPUC2
51
58
CPUT0
CPUT1
54
52
CPUT2
59
CPU_STOP*
63
FSLA_REF0
FSLB_REF1
62
ICS951461
U517
48MHZ_0
5
6
48MHZ_1
ATIGCLKC0
42
ATIGCLKC1
40
36
ATIGCLKC2
34
ATIGCLKC3
R743
1%
13-B3
9-D4
P3.3V
49.9
1%
475
R645
1%
49.9
R751
1%
33
R646
49.9
R648
41-D4
33
R752
C791
100nF
R732
0
P3.3V
33-C4 54-C3
BLM18PG181SN1
R649
33
35-C4 54-B3
B516
1%
R739
49.9
49.9
R641
1%
C719
100nF
14.31818MHz
Y502
2801-004667
1
2
54-B449-C440-C3
1%
R747
49.9
TP18457
TP18458
P3.3V
49.9
R736
1%
C720
100nF
R696
33
1%
R750
49.9
C789
19-A4 54-C4
13-B3
0.022nF
6.3V
C786
4700nF
33
41-D4
33
R638
R754
17-B2 17-B420-A4 20-C3 54-D235-C233-C4
33
R640
20-D2
49.9
R639
1%
10nF
C718
R748
33
R756
1M
9-C4
15-B4
nostuff
1%
R734
49.9
nostuff
10V
100nF
C790
CLK3_USB48
MINIPCIE3_CLKREQ#
EXP3_CLKREQ#
CLK1_PEG#
CLK1_PEG
CLK0_HCLK1#
CLK1_PCIEICH#
CLK1_NBSRC#
CLK1_PCIELOM#
CLK1_EXPCARD#
CPU1_BSEL0
CPU1_BSEL2
CLK1_PCIELOM
CLK0_HCLK0#
CLK0_HCLK0
CLK1_PCIEICH
CLK1_NBSRC
CLK1_PCIERCLK
CLK1_MINIPCIEA#
CLK1_MINIPCIEA
CLK1_PCIERCLK#
CLK1_EXPCARD
CLK3_ICH14
CPU1_BSEL1
CLK3_NB14M
CLK0_HCLK1
SMB3_CLK
SMB3_DATA
CLK3_PWRGD#
CHP3_CPUSTP#
ITP3_DBRESET#