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SYMBOL PIN DESCRIPTION
V
ip
1 non-inverting voltage input
V
DDL
2 supply voltage LOW
V
in
3 inverting voltage input
GND 4 ground, substrate
I
om
5 black current measurement
output
V
DDH
6 supply voltage HIGH
V
cn
7 cathode transient voltage output
V
oc
8 cathode DC voltage output
V
fb
9 feedback voltage output
Fig.2 Pin configuration.
ndbook, halfpage
MGA057
1
2
3
4
5
6
7
8
9
DDL
V
GND
TDA6111Q
ip
V
in
V
om
I
oc
V
cn
V
fb
V
DDH
V
2-6(!!!*T13_Q:d*13_Q!d*13_Q#W
IG@Cg*-F=L>=[
<FEEFEL
Fig.1 Block diagram.
handbook, full pagewidth
DIFFERENTIAL
STAGE
MIRROR
MIRROR
CURRENT
SOURCE
MIRROR
MIRROR
TDA6111Q
7 V
supply voltage
input HIGH
feedback
output
6
V
bias
FOLLOWERS
C
par
9
non-inverting
input
inverting
input
3
1
42
ground
(substrate)
supply voltage
input LOW
7
8
5
cathode
transient
output
cathode
DC output
black current
measurement
output
MGA058
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