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Sharp CMS-555E(GY) - Page 24

Sharp CMS-555E(GY)
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CMS-555E
@)
IC301
RH-iX1646AFZZ
(RH-IX1646AF)
Name
Input/Output
i
©)
P30
Output
Key
matrix
output
P03
/SI
P02/SO
P01/SCK
P63
(A-STP-|)
P62
(CE)
P61
{DATA)
P6O{CLK)
P53
(C-REQ-I)
13
P52
(STEREO)
14
P51
(SD)
15
P50(SYS-STP-I)
16>
P43(C-STA-O)
Input
SD
signal
input
Input
~
wl
r
*
Input
Input
Output
Output
Output
Input
Input
Input
Input
Output
System
stop
Count
start
output
FM
monaural/stereo
signal
output
H:
FM
stereo
L:
FM
monaural
Muting
signal
output
LCD
ON/OFF
output
Connect
the
ceramic
resonator
7
P42(MONO/ST)
Output
[oe]
= =
i)
P41
(MUTE)
Output
Output
Output
Input
20
nN
as
Connect
the
ceramic
resonator
No
No
ay
—_h
<
wf
are
ee)
S
VLC3
VLC2
VLC1
VDD
CcOM3
COM2
COM1
COMO
$23-S0
INT1
RESET
CL
DD
2
Ground
No
ive)
Input
Power
supply
input
for
LCD
Input
Power
supply
input
for
LCD
No
ol
Input
Power
supply
input
for
LCD
i)
[27]
Connect
to
power
supply
27%
2
Output
Output
Output
Output
Output
Input
Not
used.
Open.
c
Remote
control signal
output
for
LCD
ho
9
Remote
control
signal
output
for
LCD
i)
jm)
Remote
control
signal
output
for
LCD
31-54
LCD
segment
output
Remote
control
input
Input
Reset
input
ol
~~
—_
Input
System
clock
input
Connect
to
power
supply
he
fi
C
Output
System
clock
output
Input
Key
strobe
input
63
In
this
unit,
the
terminal
with
asterisked
mark
(>)
is
(open)
terminal
which
is
not
connected
to
the
outside
CMs
55E
PIO/ZINTO
POQO2/S0
POSZS
I
e—@
=
PO1/SCK
(s}—{8)
17)
oe
ae:
INT
1
COUNT
CLOCK
TIMER/EVENT|
_[INTERRUP
CLOCK
CONTROL
COUNTER
CONTROL
MH{SERIAL
INTERFAC
GENERATOR
7
A
Bea
if
1h
if
LED
CL
PORT
Oba,
¢
PO1~POS
ft
I]
l]
ft
:
BUFFER
@
3
5
|
7
:
€9
PROGRAM
COUNTER(12)|
\atu/
ACA)
PORT
1p
Fpioep1g
BUFFER
{|
GENERAL
REGISTERS
PORT
3
<—]
tatcH
4)
|
BUFFER
PROGRAM
MEMORY
ae
Ee
[YF
INSTRUCT
ION
LA)
KY
4096x8
BITS
cnn
oetatiee
STACK
POINTER(8)
Cat
ea
Jas
1
ig
BUFFER
VY
PORT.
&
taro
Ka>
©
7
DATA
MEMOR'Y
BUFFER
d
Cc
224x4
BITS
PORT
6
ore
Ee
Kz
©)
SYSTEM
STAND-BY
ed,
BUFFER
CLOCK
CONTROL
GENERATOR
LCD
CONTROLLER/DRIVER
a
Led,
lJ
a
G7)
69)
638)—@2)—(56)-23)
~
5)
G1)
~~
6)———_@7)
~
90
Cli
CL2
VDD
VSS
RESET
VLC1,
S$0-S23
COMO-COM3
VLC2.
VLC3
Oo
E
Zz
=
=
N22,
We
Nor-AMONA-OeE
Newer
IUOOIGWZOrN
LOMaaLloror--
Munn
Odooo0doddocdoodo0o0crncodcooeo
NC
oO
|
O33
P32
0
2
Oo
S4
P31
0
3
=O
SS
P30
0
4
0
S36
PQ3/S1
0
5
0
S7
PO2/S0
©
6)
0
$8
PO1/SCK
O
cA
0
S9
P63
O
8
O
ae
P62
0
9
O
P61
O
190
RH-1X1646AF
5
$12
P60
O-
14
0
S13
P53
0
12
=O
314
P52
O=
13
0
S15
PS1
0
14
OS16
PSO
0
1S
OS17
P43
0
16
0
S18
P42
0
17
0
S19
P41
0
18.
0
S20
P40
Om
=41198
oO
$21
Figure
32
BLOCK
DIAGRAM
OF
IC
>

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