Training course: D44
9
SEES Engineering Department
2. Block Diagrams (continued)
Main ICs
This IC includes the main features show below:
1- An enhanced ST20 32-bit VL-RISC CPU with a 200MHz clock, 4Kbytes of instruction cache, 4Kbytes of data cache and 2Kbytes of
embedded SRAM.
2- A 16-bit, 166MHz Shared Memory Interface, with support for 64- and 128-bit confi gurations.
3- A programmable External Memory Interface supporting 4 separately confi gurable banks of SRAM, Flash and DRAM.
4- An MPEG-2 (MP@ML) decoder, including trick modes such as smooth fast-forward and rewind.
5- A Graphics/Display unit with 4 display planes, alpha blending, antialiasing and antifl utter fi lters, subpicture decoder, and blitter
display compositor with separate OSD (On-Screen Display) controls for TV and VCR outputs.
6- PAL/NTSC/SECAM encoder.
7- CGMS, Teletext, WSS, VPS encoder.
8- MPEG-1 layer I/II audio subsystem with embedded DSP for all popular audio formats.
9- A full range of on-chip peripherals, including 2 UARTs, 3 parallel I/O banks, 1 smartcard interface, four PWM channels, 1 IR
transmitter/receiver, etc.
IC4252: NVM 64Kb-E2PROM FOR DIGITAL PROCESSOR (IC4001).
Part Number : BR24S64FVM-WTR SHARP Code: VHIBR24S64M-1Y
The BR24S64FVM is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data related to the Digital Module
(Channels, User settings, etc.).
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