8
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2-2-2. Internal registers
Symbol Name
Bit
size
Descripti
on
p
Program
co
unter
16 Indic
ate
s the
add
ress next to t
he
addr
ess t
he
CPU
is
now
in
execut
i
on
It will
be
i
ncr
emented
by
'"I "
VJhe
n the n
ext
inst
ruc
tion is f
etc
hed.
s
Stack
16 Indicates the stack address.
p
oi
nte
r
A
A
cc
u
mu
l
ator
8
Used
for
reten
ti
on
of
operat
iona
l
res
ult
or
for
data
tra
ns
fer
\V
it
h the
ex
ter
n<JI
memo
ry.
XL 8
XL, XH. YL.YH,UL. UH
compr
ise independent 8·
Xr
eg
XH
8
bit
registers.
Also.
1..1s
ed
as
16-bit
da
ta
poin
t
er
s. Xreg. Yreg.
and
YL
8
Ur
eg.
v1
he
n used
in
a
pair
.
Yr
eg
YH
Data register
8
UL
8
Ur
cg
UH
8
TM T
imer
co
un
ter
9
When "
O'
' is set
to
the TM. it
stops
the
co
unte
r
act
i
on
.
Whe
n
anyth
i
ng
other
t
ha
n
"O
..
is set. it
puts
the
cou
nt
er
into a
ction
.
\A
1
he
n
the
TM
t
urns
f
ull
of
..
,
..
v1
ith !
he
int
er
r
up
t e
nabl
e s
igna
l IE on.
C
PU
ex
ecu
t
es
an
in
terr
up
t
processing
.
PU
1 General purpose
fl
ip
-
flo
p.
PV 1
OISP
1
LCD
on
/off
co
ntr
ol.
T
St
at
us
regist
er
8
Lo
w
order
5 bits re
pr
esent one
of
five status
of
oper
at
ional r
es
ul
t.
2-2-3. Status flags
Status !lags.
C.
V.
H. Z. IE
ar
c contai
ne
d
in
the 8-bit s
ta
cus
register.
In
general.
!l
ags nther
than
IE change their state
af
ter the exec
uti
on
of
arithmetical instruction.
Status re
gister
T
=I
0 I O I 0 IHI VI Z I 1Ej CI
Q)
C
arry
flag
C
Ca
rr
y
fl
ag C is set
wh
en there
is
a carry from the MSB and r
eset
whem
there is no carry.
For
SUBTRACT.
th
e !lag is set when there is no borrow or
re
set
whe
n t
he
re
is.
@
Half
c
arry
flag
H
Ha
lf carry
fl
ag
H
is
set w
hen
th
ere is a carry from the b
it
position
'"3"
(d
ig
it
-to-di
gi
t
can
y) and
re
se
t
whe
n the
re
is
no
carry.
(j)
Zero
flag Z
Ze
ro !lag Z is
set
wh
en
the operational r
es
ult is zero and reset when not.
© Overflow flag V
Qv,er
flo
w !lag Vis set
or
reset dependi
ng
on t
he
operational r
es
ult
of"C
6E
l:1
Cr;
where.
th
e carry from
th
e bit po
si
tion 6
of
a
si
ngle byte data is assumed to
be
( 6 a
nd
the carry
from the bit p
os
it
ion 7 to
be
C7
Single byte
da
ta
I I I I I I I I ]
87
86
85
84
83 82
8 1 BO
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not
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