Technical data of CPU 31x
7.5 CPU 315-2 PN/DP
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06
7-21
Technical data
Removal
Module rack Max. 4
Modules per rack 8
Number of DP masters
• Integrated
1
• Via CP
4
Operable function modules and communication processors
• FM
Max. 8
• CP (PtP)
Max. 8
• CP (LAN)
Max. 10
Time
Clock Yes (hardware clock)
• Factory setting
DT#1994-01-01-00:00:00
• Buffered
Yes
• Buffered period
Typically 6 weeks (at an ambient temperature of
40 °C)
• Behavior of the clock on expiration of the
buffered period
The clock keeps running, continuing at the time-
of-day it had when power was switched off.
• Behavior of the realtime clock after POWER
ON
The clock continues running after POWER OFF.
• Accuracy
Deviation per day: < 10 s
Operating hours counter 1
• Number
0
• Value range
2
31
hours
(if SFC 101 is used)
• Granularity
1 hour
• Retentive
Yes; must be manually restarted after every
restart
Time synchronization Yes
• In the AS
Master/slave
• On MPI
Master/slave
S7 message functions
Number of stations that can be logged on for
signaling functions
16
(depends on the number of connections
configured for PG / OP and S7 basic
communication)
Process diagnostics messages Yes
• Simultaneously enabled interrupt S blocks
40
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