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Technical data of CPU 31xC
6.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06
6-31
Block diagram of integrated digital I/O of CPUs 313C/313C-2/314
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Table of Contents
Default Chapter
2
A5E00105475
2
Table of Contents
9
1 Guide to the S7-300 Documentation
15
Table 1-1 Ambient Influence on the Automation System (AS)
15
Table 1-2 Galvanic Isolation
15
Table 1-3 Communication between Sensors/Actuators and the PLC
16
Table 1-4 the Use of Local and Distributed I/O
16
Table 1-5 Configuration Consisting of the Central Unit (CU) and Expansion Modules (Ems)
16
Table 1-6 CPU Performance
17
Table 1-8 Software
17
Table 1-9 Supplementary Features
18
2 Operating and Display Elements
19
Operating and Display Elements: CPU 31Xc
19
Status and Error Indicators: CPU 31Xc
22
Table 2-2 Differences of the Cpus 31Xc
22
Operating and Display Elements: CPU 31X
23
Operating and Display Elements: CPU 312, 314, 315-2 DP
23
Table 2-3 Mode Selector Switch Settings
24
Operating and Display Elements: CPU 317-2 DP
25
Table 2-4 Mode Selector Switch Settings
26
Operating and Display Elements: CPU 31X-2 PN/DP
27
Operating and Display Elements: CPU 319-3 PN/DP
29
Status and Error Displays of CPU 31X
31
Table 2-7 General Status and Error Displays of the CPU 31X
31
Table 2-8 Bus Error Displays of CPU 31X
31
3 Communication
33
Interfaces
33
Multi-Point Interface (MPI)
33
Profibus Dp
34
Profinet (Pn)
35
Point to Point (Ptp)
37
Communication Services
38
Overview of Communication Services
38
Table 3-2 Communication Services of the Cpus
38
PG Communication
39
OP Communication
40
Data Exchanged by Means of S7 Basic Communication
40
S7 Communication
40
Global Data Communication (MPI Only)
41
Table 3-3 Client and Server in S7 Communication, Using Connections with Unilateral / Bilateral Configuration
41
Table 1-7 Communication
42
Routing
43
Table 3-5 Number of Routing Connections for DP Cpus
45
Point-To-Point Connection
47
Data Consistency
47
Communication by Means of PROFINET
48
PROFINET IO System
51
Blocks in PROFINET IO
52
Table 3-6 New System and Standard Functions/System and Standard Functions to be Replaced
52
System Status Lists (Ssls) in PROFINET IO
54
Table 3-8 Obs in PROFINET IO and PROFIBUS DP
54
Table 3-9 Comparison of the System Status Lists of PROFINET IO and PROFIBUS DP
55
Open Communication Via Industrial Ethernet
56
SNMP Communication Service
59
S7 Connections
59
S7 Connection as Communication Path
59
Assignment of S7 Connections
60
Distribution and Availability of S7 Connection Resources
62
Table 3-10 Distribution of Connections
62
Table 3-11 Availability of Connection Resources
63
Connection Resources for Routing
64
Table 3-12 Number of Routing Connection Resources (for DP/PN Cpus)
64
Dpv1
65
Table 3-13 Interrupt Blocks with DPV1 Functionality
66
Table 3-14 System Function Blocks with DPV1 Functionality
66
4 Memory Concept
69
Memory Areas and Retentivity
69
CPU Memory Areas
69
Retentivity of Load Memory, System Memory and RAM
70
Retentivity of Memory Objects
71
Table 4-2 Retentivity Behavior of Memory Objects (Applies to All Cpus with DP/MPI-SS)
71
Address Areas of System Memory
72
Table 4-3 Retentive Behavior of Dbs for Cpus with Firmware >= V2.1.0
72
Properties of the SIMATIC Micro Memory Card (MMC)
76
Memory Functions
78
General: Memory Functions
78
Loading User Program from SIMATIC Micro Memory Card (MMC) to the CPU
78
Handling with Modules
79
Download of New Blocks or Delta Downloads
79
Uploading Blocks
79
Deleting Blocks
80
Compressing Blocks
80
Promming (RAM to ROM)
80
CPU Memory Reset and Restart
81
Recipes
82
Measured Value Log Files
84
Backup of Project Data to SIMATIC Micro Memory Card (MMC)
86
5 Cycle and Reaction Times
87
Overview
87
Cycle Time
87
Calculating the Cycle Time
90
Different Cycle Times
93
Communication Load
94
Cycle Time Extension as a Result of Testing and Commissioning Functions
96
Cycle Extension through Component Based Automation (CBA)
96
Response Time
99
Overview
99
Shortest Response Time
101
Longest Response Time
102
Reducing the Response Time with Direct I/O Access
103
Calculating Method for Calculating the Cycle/Response Time
104
Interrupt Response Time
106
Overview
106
Reproducibility of Time-Delay and Watchdog Interrupts
108
Sample Calculations
108
Example of Cycle Time Calculation
108
Sample of Response Time Calculation
109
Example of Interrupt Response Time Calculation
111
6 Technical Data of CPU 31Xc
113
General Technical Data
113
Dimensions of CPU 31Xc
113
Technical Specifications of the Micro Memory Card (MMC)
114
Cpu 312C
115
Cpu 313C
120
CPU 313C-2 Ptp and CPU 313C-2 DP
126
CPU 314C-2 Ptp and CPU 314C-2 DP
133
Technical Data of the Integrated I/O
140
Arrangement and Usage of Integrated I/Os
140
Analog I/O
146
Parameterization
150
Interrupts
155
Diagnostics
156
Digital Inputs
157
Digital Outputs
159
Analog Inputs
161
Analog Outputs
163
7 Technical Data of CPU 31X
167
General Technical Data
167
Dimensions of CPU 31X
167
Technical Specifications of the SIMATIC Micro Memory Card (MMC)
168
Cpu 312
169
Cpu 314
174
Cpu 315-2 Dp
179
Cpu 315-2 Pn/Dp
185
Cpu 317-2 Dp
192
Cpu 317-2 Pn/Dp
199
Cpu 319-3 Pn/Dp
206
A.1 Information about Upgrading to a CPU 31Xc or CPU 31X
217
A.1.2 Changed Behavior of Certain Sfcs
218
Appendix
219
A.1 Information about Upgrading to a CPU 31Xc or CPU 31X
219
Interrupt Events from Distributed I/Os While the CPU Status Is in STOP
220
Runtimes that Change While the Program Is Running
220
Converting the Diagnostic Addresses of DP Slaves
221
Reusing Existing Hardware Configurations
221
Replacing a CPU 31Xc/31X
222
Using Consistent Data Areas in the Process Image of a DP Slave System
222
Load Memory Concept for the CPU 31Xc/31X
223
PG/OP Functions
223
Routing for the CPU 31Xc/31X as an Intelligent Slave
223
Changed Retentive Behavior for Cpus with Firmware >= V2.1.0
224
Fms/Cps with Separate MPI Address in the Central Rack of a CPU 315-2 PN/DP, a CPU 317 or a CPU 319-3 PN/DP
224
Using Loadable Blocks for S7 Communication for the Integrated PROFINET Interface
225
Glossary
227
Index
238
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Siemens CPU 314C-2 PtP Specifications
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Model
CPU 314C-2 PtP
Category
Processor
Language
English
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