SiTime SiT95210 - Introduction; Features; Top Level Block Diagram

SiT95210 Evaluation Board (EVB) HW User Manual
SiT95210EB User Manual | Rev 0.5
Page 2 of 17
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1 Introduction
The SiT95210 Evaluation Board is designed for evaluating the SiT95210 Quad PLL Frequency Translator, Jitter Cleaner.
Figure 1. SiT95210 EVK Board
2 Features
1) Support SiT95210 part
2) Outputs having Wide frequency support
a. Differential Output from 0.5 Hz to 2.94912 GHz
b. Single Ended Output from 0.5 Hz to 250 MHz
c. Differential Input from 8 KHz to 2.1 GHz.
d. Single Ended Input from 8 KHz to 250 MHz
e. Multiple XO support
3) LVPECL,CML, HCSL, LVDS and LVCMOS Output Standard Support
4) Powered from USB Port or external power supply
5) Status LEDs for power supplies
6) SMA connectors for input clocks, output clocks and external reference clock/XO Input clock
7) On board LDO’s with configurable jumpers for all Power supplies
8) I
2
C/SPI communication via MS430 MCU
9) SiTime Clock GUI to configure the EVK via USB
10) Additonal USB Support for powering up the 2 Output Drivers
3 Top Level Block Diagram