5-1.
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SECTION 5
DIAGRAMS
j14E5ti4F5,-BKM-=-10Ronly - - - - - - -
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S\06 i APT
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IC4,7,8
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CARO AOOR HIGH
S218
S217
S216
S215
A OOR DECODER
DECODER
BUFFER
IC 9-11
INVERTER
BUFFER
IC
1
C P U
IC201 202
H41
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1 ,2
S301
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S302 I
BRIGHT
S303 i CHROMA
I
S304 i
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IC13
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1
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BK
0
0 0
0
0
0 0
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I
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0300-305
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sw·J=:::::iffi _______________________ l
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X\03
14,5MHz
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IC3,4,9101 125
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CPU
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1
C315,317,318,327-3!l
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EE
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OVERLOAD COMP
BUFFER
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CHAR BLK
SY STEM CONTROL S IGNA
( 46 line)
---
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5-1
5-2
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