Sony CDP-S1 - Page 7

SECTION 4
DIAGRAMS
4-1. IC PIN DESCRIPTION
¢ 1C801 CXP82316-0440 SYSTEM CONTROL, FLD. DRIVE
_PinName | vO | escription
river [1 [Nowa GD) OCOC“‘“S*SC‘“‘“‘“SCSC“Cs*‘“~*“‘“‘~CS*~*Y
Pausny[1 [avBUSinpu ——OSOSCSC~“~“S~“‘—SCSS
OPEN
BUSOUT
AU BUS output
PGML Latch signal output to digital filter (IC305)
= | Notused open)
bees
| Oo
| Oo
CLK |__| Seriatclockoutput
Ex
om
am
eles
Not used (open)
FOPEN | = | Notused (oper)
AMUTE hae | Analog muting control signal output “H”: Mute
LDON | 0 | Optica pickup laser diode contol ouput “Hs0n
Pair | 0 | Seriadatalachsignaloupt SS SSCSSCSC*S
Za
7
10
11
12
13
OPEN Not used (open)
JOGINB I
za Jog dial signal input
JoGINA | 1
20 LDOUT
| 20 ai | Loading motor control signal output
LDIN | O_
ADJAFADJ | 1 | ADS, AFI testpin
INOUTSW | I | Loading IN/OUT switch input
KEYO
25 — 29 | OPEN Not used (open)
30 RESET
31 EXTAL
32 XTAL
S
34— 49 | OPEN
50—61 | S1—S12
62 OPEN
63 —70 | 1G—8G
71 -30V
14
15
16
17
18
Reset signal input
Clock input (4MHz)
Clock output (4MHz)
GND
Not used (open)
I
<
nm
LS) WwW
FL segment output
Not used (open)
FL grid output
~30V pin for FL display tube
5
Not used (+5V)
Not used (open)
< +
5
OPEN
SCOR
+5V
+5V
74—TI
78 —
Read out timing signal input for subcode Q data
Not used (+5V)
Not used (+5V)
~ wo + |< <
~]
\O
~
uv 0