Sony CFD-S20CP - The CD Player: Shuffle and Program Play; Playing Tracks in Random Order (Shuffle Play); Creating Custom Playlists (Program Play)

17
CFD-S20CP
1 LRSY I CD L/R clock input
2 ADDATA O Audio data output
3 ADBCK O Audio bit clock output
4 ADLRCK O Audio L/R clock output
5 C2FIN I CD C2 error flag input
6 VSS — Ground
7 CKIN I System clock (16.9344 MHz) input
8 VSS — Ground
9CKOUT O Clock (384Fs) output for external DF/DAC.
10 VSS — Ground
11 DVDD1 — Digital power supply pin for I/O.
12 PW I CD subcode data serial input
13 SBSY I CD subcode block synchronized signal input
14 SFSY I CD subcode frame synchronized signal input
15 SBCK O Serial clock output for CD subcode transfer. (Not used. (Open))
16 AVDD — Analog (PLL) power supply pin
17 VPRFR — VCO oscillation range setting pin
18 VCOC I VCO control voltage input
19 VPDO O VCO charge pump output
20 AVSS — Analog ground
21 DVDD2 — Power supply pin for internal logic.
22 VSS — Ground
23 to 30 MDATA0 to 7 I/O DRAM data bus 0 to 7
31 DVDD3 — Digital power supply pin for I/O.
32 VSS — Ground
33 to 40 MDATA8 to 15 I/O DRAM data bus 8 to 15
41 RASB O Row Address Strobe signal output (L: active)
42 WEB O Data Write Enable signal output (L: active)
43 CASLB O Column Address Strobe signal output (for lower byte, L: active)
44 CASUB O Column Address Strobe signal output (for upper byte, L: active)
45 OEB O Output enable signal output (L: active)
46 to 49 MADRS12 to 9 O DRAM address output 12 to 9 (Not used. (Open))
50 MADRS8 O DRAM address output 8
51 DVDD4 — Digital power supply pin for I/O.
52 VSS — Ground
53 to 60 MADRS7 to 0 O DRAM address output 7 to 0
61 DVDD5 — Power supply pin for internal logic.
62 VSS — Ground
63 STREQ I/O
MP3 data request flag output (H: active)/DRAM data request flag input (H: active)
(Not used. (Open))
64 STCK I/O MP3 data transfer clock input/DRAM data transfer clock output (Not used. (Open))
65 STDAT I/O MP3 data serial input/DRAM data serial output (Not used. (Open))
66 FSYNC O MP3 frame synchronized signal input (H: active) (Not used. (Open))
67 CRCF O
CDROM-CRC flag output (H: active)/DRAM data output enable signal output
(H: active) (Not used. (Open))
68 DVDD6 — Power supply pin for internal logic.
69 VSS — Ground
70 WOK I
DRAM write OK input (at CD-DA, H: active)/DRAM data request flag input
(at CD-ROM, H: active)
SECTION 6
DIAGRAMS
6-1. IC PIN DESCRIPTIONS
• IC1001 LC78683E-US-E (MP3 DECODER, CD-ROM DECODER, ANTI-SHOCK CONTROLLER) (CD BOARD)
Pin No. Pin Name I/O Pin Description