Sony HCD-H700 - SECTION 6 DIAGRAMS; 6-1. SEMICONDUCTOR LEAD LAYOUTS; 6-2. CIRCUIT BOARDS LOCATION; 6-3. PRINTED WIRING BOARDS - MAIN SECTION

elC Block Diagrams
@ Semiconductor Location
021 (*2) 05 (#2)
081 07 (#1)
0202 Q7 (#2)
0205 (+3) 08 (#1)
0206 08 (#2)
0207 (43) 09 (#1)
0208 09 (#2)
D401 010 (#1)
D801 010 (#2)
0810 Q11 (#2)
0901 051 (#1)
0902 051 (#2)
p904 052 (#1)
D905 052 (#2)
0906 053 (#1)
0907 054 (#1)
D909 0101
0910 Q102
0914 Q103
0915 0201
0916 0202
0921 0231 (#3)
0232
0233
0234
0235 (#3)
0236 (+3)
0237
0251
0252
0301
0302
301
*1C801 STK-4132MK2
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.
a
+
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| a Re
ot
wo
—— po
[ae eee Tobe tt
NMNNMMNO HHP ON
1 (eae a)
muTe (6)
1
1
POM HP DY HM MYND NP
0923
0924
=xSmMmmMmen— nNVVVTCVCVTVOMBWWDBWVOUVON0
NAM PD HOH POA OMONW—
ePne
PROTECT (@)
v=
out ouT
Vref OUT
1C51
1C81
10201
10231
10232
1C234
1C236 (+3)
1C251
1C301 (#1)
1C302
1C406
1C801
1C901
1C902
1C9001
01 (#1)
QI (*2)
04 (#1)
04 (#2)
05 (#1)
(*1): H170/AEP, H700 MODEL
(#2) : H170/E, EA, AUS, H170K MODEL
(#3): H170K MODEL
@ EA: Saudi Arabia
AUS : Australian
BOUT STRAP
BOUT STRAP (G)
1orobotoa
1
*1C201, 251 M5229P
INV, NON-INV
GNO +vVCC OUTPUT INPUT INPUT
wy “Wy aa
L 7k
4
47k 47k 47k
560 560. 560: 560:
(3) (4) S) (6) (1) (*)
IN1
NF 4 IN2 NF2 IN3 NF3
-vcc
NF7
tot
ES Ron ce eee ee Ocoee COON —NMOBON~INwO~
Oommoe bs CD A ae la A
t
l
CO WOW
FM-SD
ADJ
V-REF
AM~RF
IN
TU-ST
RESET
-1C231, 236 MC14066BCP
Ge) IF-BUFF
(2) aM-IF @) 6nd
x
4
=
1
=
<
Ge)
-1C406 LB1639
ouT2 vcc
ORIVE |
ING
i [}— |
Ll
[asc]
FM 7
LEVEL DET
a
T EEE
(3)-—(4) a ae (8)
GNO V CONT IN2
ch al |
DET PITRIG
caked
FM-IN
Vee
FM-AFC
AM-DET
OUT
DET
vco
STOP
SEP
—36—
6-3. PRINTED WIRING BOARDS) - MAIN SECTION — e See page 34, 35 for Semiconductor Lead Layouts and Circuit Boards
ee ee lee 9
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b Graaeal wi varton HIPOK 3 |
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1
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a A
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D
-IC901 M5230L-A
OVERCURRENT
PROTECTION
cIAcuIT
cnn ()
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BALANCE
ADJ
ouT (-) @)
IN(-) @)
VOLTAGE
ADJ
OUT (+)
IN (+)
ouT
*1C232, 301 M5218AF
<q
(1}—{2) 3
VEE
O
ey lee
©
CONTROL
TO DISPLAY
BOARD CNIOO!
TO DISPLAY
BOARD CNIOO02
—38