ST ST7735R - 8 Timing chart; 8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface)

ST7735R
V0.2 21 2009-08-05
8 Timing chart
8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface)
Figure 8.1.1 Parallel interface timing characteristics (8080 series MCU interface)
Ta=25 ℃, VDDI=1.65~3.7V, VDD=2.3~4.8V
Signal Symbol Parameter Min Max Unit Description
TAST Address setup time 10 ns
D/CX
TAHT Address hold time (Write/Read) 10 ns
-
TCHW Chip select “H” pulse width 0 ns
TCS Chip select setup time (Write) 15 ns
TRCS Chip select setup time (Read ID) 45 ns
TRCSFM Chip select setup time (Read FM) 355 ns
TCSF Chip select wait time (Write/Read) 10 ns
CSX
TCSH Chip select hold time 10 ns
-
TWC Write cycle 66 ns
TWRH Control pulse “H” duration 15 ns
WRX
TWRL Control pulse “L” duration 15 ns
TRC Read cycle (ID) 160 ns
TRDH Control pulse “H” duration (ID) 90 ns
RDX (ID)
TRDL Control pulse “L” duration (ID) 45 ns
When read ID data
TRCFM Read cycle (FM) 450 ns
TRDHFM Control pulse “H” duration (FM) 90 ns
RDX (FM)
TRDLFM Control pulse “L” duration (FM) 355 ns
When read from frame
memory
TDST Data setup time 10 ns
TDHT Data hold time 10 ns
TRAT Read access time (ID) 40 ns
TRATFM Read access time (FM) 340 ns
D[17:0]
TODH Output disable time 20 80 ns
For CL=30pF
Table 8.1.1 8080 parallel Interface Characteristics