Teac MT-20D-IO - Page 87

"BASIC"
(35) TPl (CLK) PCBA Interface Control
Test point for measuring the clock signal for internal control.
TPl is used to check the clock frequency.
TPl
Frequency = 3.6 MHz
Fig. 356 Example of waveform at TPl
(36) TP2 (CIN) PCBA Interface Control
Test point for measuring the Cassette In signal.
TP2 is used to check the cassette-in detecting operation.
J4-14 CLD signal
TP2
Cassette In
Delay time
(a) PCBA issue A~C
J4-14 CLD signal
~~-----------------
TP2
I
I I Cassette In
---------'1
I Delay time .1
(b) PCBA issue D~
Fig. 357 Example of waveform at TP2
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