Technics SL-PJ28 - Page 11

¢ 10704 (MN6650): Digital servo processor
Sia
Hs
|
tes
|
o
|
Acs
shunt
signal
fa
|
mar
|
0
|
Play
signal
(H":
play)
oe
[2
|
meer
|
|
RF
det.
signal
(“L”:
det.)
f+]
0
|:
|
Dropout
signal
("H":
dropout)
Dican
[ee [frees
Pr | we | oo | Ris Aas status signal
input)
fo] me | 1 Focus error signal (analog input)
ames
oo
Laser power control (“H”: ON)
Off track signal (“H”: off track)
a
m
GND terminal
Power supply terminal
Power supply terminal
Traverse servo control output ..
fw] wo | o | Traverse drive signal output
Focus drive signal output
Tracking drive signal output
31
—18—
Pe) seas ees
enon] rete | [RE] met [on] Pn
Division
[om | & [omen
orf fem
ITRON ie)
27 MDATA 1 Command data signal
MCLK i Command clock signal
MLD |
SENSE °
IFLOCK
To
s
3
3 ° Optical servo condition (focus)
2 output .
Optica! servo condition =~
(tracking) output
“| Teat;terminal (Ordinaly: L)
Eee | Tracking baiance adj. output
Spindle servo phase synchro
signal (“H”: CLV, “L”: Rough
servo)
Tracking servo ON signal (“L”:
ON)
Command foad signal (“L”:
LOAD)
Sense signai
Reset signal (“L": reset)
Clock input (f= 16.9344 MHz)
Test terminal (Ordinaly: open)
Oscillation det. signal (H”: det.)
Track cross signal input
¢ IC706 (MN6626): Digital signal processor
Se
Pe [mer [1 [Reteronce uvent input
Pa [ane [1 [ar aig inout
OSL bias terminal
peje | t [peicttren |
Ps [Baur [WO [St too ter ierninay |
Ce
[7 [Aveo [1 [Power aut tinal
RF signal polarity setting
RSEL
9
iy
terminal
(Not used, connected to VDD)
Test terminal
Flag terminal
Interpolation flag terminal
|
| o |
Crystal frame clock
ena] (Not used, open}
20 |
| o |
Byte clock (Not used, open)
Word clock (Not used, open)
fae | wet _[ 1 [Reston |
[| 0 [iar use waret |
Leh deglitch signal
[| ws | o | (Not used, open)
Reh deglitch signat
(Not used, open)
| 26 | SRDATA | 0 _| Serial data output (MSB first)
far [sox [0 [serartceckouout
[as | enc [0 [un aserminatng sora
Crystal OSC terminal
fa] xx | io | (f= 16.9344 MHz)
Frequency division clock signal
PMCK (Not bisa open)
(t=395* CK=88.2kHz)
| 31 | CSEL Test terminal
| 32 | PSEL (Connected to GND)
ae dor OSC terminal
| x2 | | 0 | (f= 186.9344 MHz) Pte
fos [ves [= [enb temas
foe [svea [0 |sibeneaaae ———_—*s|
fer [sack [1 [sib sede a register cook |
= Sub-code frame clock
EI CLOCK | o | (f=7.35kH2) (Not used, open)
—i9 —
[a [woo [1 |rower ups tominat |
BLKCK ; 0 | Sub-code block clock (f=75 Hz)
De-emphasis ON signal
("H”: ON)
far | Mewe | 1 Emphasio algal
Command load signal.
pe] mo fo Che LOAD)
MCLK Command clock signal
44 MDATA |
45 | D MUTE !
Command data signal
Muting input (“H”: MUTE)
System clock (f= 4.2336 MHz)
Status signal
(CRC, CUE, CLVS, TTSTOP,
FCLV, SQOK)
Sub-code CRC check terminal
("H": OK, “L”: NG)
° Sub-code serial output data
(Not used, open)
Sub-code serial output clock
{Not used, open)
Tracking servo ON signal
("L": ON)
Turntable servo phase synchro
signal
("H": CLV, “L”: Rough servo)
Turntable motor ON signal
js] ro | : (bn: ON)
ECM Turntable motor drive signal
(Forced mode) - _.
Turntable motor drive signal
ECS
(Servo arror signal)
. TEST zz Test terminal (Normal: “H’")
“SUBQ” terminal mode select
Sset po | (“H": Q code buffer}
MSEL “SMCK" terminal frequency
select (“L": SMCK =4.2336 MHz)
RESY Re-synchronizing signal of frame
sync. (Not used, open)
Drop-out detection signal
("H": Drop-out)
(Not used, connected to GND)
(62 | eM | oO | EFM signal (Not used, open)
63} pcK | oO | PLL extract clock (f= 4.3218 MHz)
Phase comparated signal of
EFM and PCK (Not used, open)