Clear and sanitize procedures
Table 4: Nonvol
atile memory devices for the HD3G7 module
Type and
minimum size Function
May
contain
user
data
1
Data input
method Location To clear To sanitize
Flash32Mx16
FPGA
configuration
No Written by
processor
system on
TG8000 main
board using
PLD U226
389-4093-00 board, U321
None. A software
upgrade will erase and
reprogram this part
Remove part
from board and
destroy
PLD with internal
512 x16 byte User
Flash Memory
PLD addresses
decoding, memory
not used
No Programmed at
factory
389-4093-00 board, U226 None Remove part
from board and
destroy
DDR2 32 M x 16 Unused No None 389-4093-00 board,
U618, U711
Remove power Remove part
from board and
destroy
SRAM 256 K x 16
Unused No None 389-4093-00 board
U521, U0521,
U621, U0621,
U622, U0622
Remove power Remove part
from board and
destroy
100 step
Electronic
Potentiometer
with EEPROM
Holds calibration
data
Yes,
Indirectly
Calibrate output
levels
389-4096-00 output board
U0113, U0114
Set output level to
minimum
Set output to
max and min
three times then
leave at min.
FPGA with 60 K
Logic elements
and 2.5Mbits of
RAM
Generates signals
from logic and
memory
Yes,
indirectly
by signal
selection
Programed from
flash at bootup,
changes state
as instrument
operates
389-4093-00 board, U811 Remove power
Set instrument
to power up on
factory default
and cycle power
three times
128 K x 8
EEPROM
Unused No None 389-4093-00 board, U224 None Remove part and
destroy
1
During normal instrument operation.
TG8000 Declassification and Security Instructions 5