Texas Instruments 99/4A - Page 32

FIGURE 2 - MEMORY MAP
MEMORY
AREA DEFINITION
address 16
MEMORY CONTENT
0 15
0000 WP LEVEL 0 INTERRUPT
0002
PC LEVEL 0 INTERRUPT
0004
WP LEVEL 1 INTERRUPT
0006
PC LEVEL 1 INTERRUPT
INTERRUPT VECTORS <
” *
003C
WP LEVEL 15 INTERRUPT
003 E
PC LEVEL 15 INTERRUPT
0040
WP XOP 0
0042
PC XOP 0
XOP SOFTWARE TRAP VECTORS <
007C WP XOP 15
007E
PC XOP 15
0080
•
•
•
GENERAL MEMORY AREA
GENERAL MEMORY FOR
PROGRAM, DATA, AND <
MAY BE ANY
WORKSPACE REGISTERS
COMBINATION OF
PROGRAM SPACE
OR WORKSPACE
•
LOAD SIGNAL VECTOR 1
| FFFC
•
WP LOAD FUNCTION
I FFFE
PC LOAD FUNCTION
Three internal registers are accessible to the user. The program counter (PC) contains the address of the instruction
following the current instruction being executed. This address is referenced by the processor to fetch the next
instruction from memory and is then automatically incremented. The status register (ST) contains the present state of
the processor and will be further defined in Section 3.4. The workspace pointer (WP) contains the address of the first
word m the currently active set of workspace registers.
A workspace-register file occupies 16 contiguous memory words in the general memory area (see Figure 2). Each
workspace register may hold data or addresses and function as operand registers, accumulators, address registers, or