I
L1
I
L1
∙cos
≥1
≥1
ON≡Enable IPD>>>> directional overcurrent element
&
&
&
&
I
PDCLP>>>>def
≥ I
PDCLP
>>>>
A
B
Non-directional
(from 74VT)
Non-directional
Logic67
C
D
IPD>>>> Enable
≥1
CB-State
74VT
Start I
2ndh>
Block1, Block2, Block4
T 0
t
CLP>>>>
&
2nd harmonic restraint enable (ON≡Enable)
I>2ndh-REST
IPDCLP>>>>Mode
t
PDCLP
>>>>
A
B
C
A =“1”A =“0 or OFF”
IPD>>>> overcurrent directional element (67) block diagram
A = ON - Change setting within CLP
B = OFF - CLP disabled
C = ON - Element blocking within CLP
≥1
CLP IPD>>>>
&
State
≥
I
PD>>>>def
I
PD>>>>def
Settore
ThetaP>>>>
Settore
Settore
Mode67
I
L2
I
L2
∙cos
I
L3
I
L3
∙cos
I
L1
I
L2
I
L3
I
PDCLP>>>>def
≥ I
PDCLP
>>>>def
&
State
≥
I
PD>>>>def
I
PD>>>>def
≥1
Block by 74VT (ON≡Block)
Internal or external
OFF
74VT
74VTint/ext67
RESET
t
PD>>>>def
0T
Start IPD>>>>
Trip IPD>>>>
TRIPPING MATRIX
(LED+RELAYS)
IPD>>>>TR-K
IPD>>>>TR-L
IPD>>>>ST-L
IPD>>>>ST-K
t
PD>>>>def
C =“2/3”
C
D =“1/3”
D
A = Directional
A
B = Non-directional
B
&
IPD> inhibition
IPD>disby IPD>>>>
Start IPD>>>>
Start IPD>>>>
Start IPD>>>>
&
IPD>> inhibition
IPD>>disby IPD>>>>
&
IPD>>> inhibition
IPD>>>disby IPD>>>>
Input U
31
Input U
23
Input U
12
t
PD>>>>RES
ST-IPD>>>>&ST-U<<
A ST-IPD>>>>&ST-U<< = OFF
B ST-IPD>>>>&ST-U<< = ON
≥1
A
B
A
B
&
Start U<<def
t
PD>>>>RES
T0
RESET
Phase directional overcurrent (67) - Fourth element logic diagram (IPD>>>>)