Toshiba T5200 - Page 87

3. MEMORY BOARD
<fig id=MMS\5200\5200A_5.TIF>Figure A-3</fig> Memory board
(1) PJ1: System board I/F connector
(2) System RAMs
(3) Memory module connector
<fig id=MMS\5200\5200A_6.TIF>Page A-6</fig>
4. I/O BOARD
<fig id=MMS\5200\5200A_6.TIF>Figure A-4</fig> I/O board
(1) SI: Super integration (JC810)
(2) SIO: Serial input/output controller (TC8570P)
(3) GA-PDC: Plasma display controller gate array
(4) PJI: System board I/F connector
(5) VFO: Variable frequency oscillator (4108AFP)
(6) PJ2: HRGS I/F connector
(7) PJ4: PRT/Ext. FDD I/F connector
(8) PJ5: SIO I/F connector 1
(9) PJ6: SIO I/F connector 2
<fig id=MMS\5200\5200A_7.TIF>Page A-7</fig>
5. HRGS BOARD
<fig id=MMS\5200\5200A_7.TIF>Figure A-5</fig> HRGS board
(1) PVGA1: Paradise video graphics array
(2) HRGS-GA: High resolution graphics subsystem gate array
(3) Video RAMs
(4) HRGS BIOS ROM
(5) DAC: Digital to analogue converter
(6) PJ1: VGA display I/F connector
(7) PJ2: System board I/F connector
<fig id=MMS\5200\5200A_8.TIF>Page A-8</fig>
6. BACK PANEL BOARD
<fig id=MMS\5200\5200A_8.TIF>Figure A-6</fig> Back panel board
(1) PJ1: System board I/F connector
(2) PJ2: 8-bit I/F connector
(3) PJ3: 16-bit I/F connector
~~
DOC:MAINTENANCE MANUAL
MODEL:T5200
MODEL:T5200C
CHAP:APPENDIX B PIN ASSIGNMENT
SECT:B.1 SYSTEM BOARD SECTION 1 of 2
DOC_ID:B T5200
LANG:ALL
TEXT: