ViewSonic VS11354 - Page 29

ViewSonic Corporation Confidential - Do Not Copy VA1930wm-1
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37 SDO I SPI Flash Serial Data Output
38 SCZ O SPI Flash Chip Select
39 SCK O SPI Flash Serial Clock
40 SDI O SPI Flash Serial Data Input
41 NC Not Connected
42 NC Not Connected
43 GPIO_P11/I2C_MDA I/O
General Purpose Input/Output; 4mA driving
strength/I2C Master Data
44 GPIO_P10/I2C_MCL I/O
General Purpose Input/Output; 4mA driving
strength/I2C Master Clock
45 NC
Not Connected
46 NC Not connected
47 NC Not connected
48 GPIO_P27/PWM1 I/O
General Purpose Input/Output; 4mA driving
strength/Pulse Width Modulation Output; 4mA driving
strength
49 VDDP I Digital Output Power
50 GND Ground
51 VDDC I Digital Core Power
52 MODE[0] I Chip Configuration Input
53 MODE[1] I Chip Configuration Input
54 LVA3P O A-Link Positive LVDS Differential Data Output
55 LVA3M O A-Link Negative LVDS Differential Data Output
56 VDDP I Digital Output Power
57 GND Ground
58 LVACKP O A-Link Positive LVDS Differential Clock Output
59 LVACKM O A-Link Negative LVDS Differential Clock Output
60 LVA2P O A-Link Positive LVDS Differential Data Output
61 LVA2M O A-Link Negative LVDS Differential Data Output
62 LVA1P O A-Link Positive LVDS Differential Data Output
63 LVA1M O A-Link Negative LVDS Differential Data Output
64 LVA0P O A-Link Positive LVDS Differential Data Output
65 LVA0M O A-Link Negative LVDS Differential Data Output
66 VDDC I Digital Core Power
67 LVB3P O B-Link Positive LVDS Differential Data Output
68 LVB3M O B-Link Negative LVDS Differential Data Output
69 LVBCKP O B-Link Positive LVDS Differential Clock Output
70 LVBCKM O B-Link Negative LVDS Differential Clock Output
71 LVB2P O B-Link Positive LVDS Differential Data Output
72 LVB2M O B-Link Negative LVDS Differential Data Output
73 LVB1P O B-Link Positive LVDS Differential Data Output
74 LVB1M O B-Link Negative LVDS Differential Data Output
75 VDDP I Digital Output Power
76 GND Ground