ZiLOG Z80

<%27
7UGT
U/CPWCN
80 2YHUYLHZ

)LJXUH +$/7([LW
3RZHU'RZQ$FNQRZOHGJH&\FOH
:KHQWKHFORFNLQSXWWRWKH&026=&38LVVWRSSHGDWHLWKHUD+LJK
RU/RZOHYHOWKH&026=&38VWRSVLWVRSHUDWLRQDQGPDLQWDLQVDOO
UHJLVWHUVDQGFRQWUROVLJQDOV+RZHYHU,&&VWDQGE\VXSSO\FXUUHQWLV
JXDUDQWHHGRQO\ZKHQWKHV\VWHPFORFNLVVWRSSHGDWD/RZOHYHOGXULQJ
7RIWKHPDFKLQHF\FOHIROORZLQJWKHH[HFXWLRQRIWKH+$/7LQVWUXFWLRQ
7KHWLPLQJGLDJUDPIRUWKHSRZHUGRZQIXQFWLRQZKHQLPSOHPHQWHG
ZLWKWKH+$/7LQVWUXFWLRQLVVKRZQLQ)LJXUH 
)LJXUH 3RZHU'RZQ$FNQRZOHGJH
CLK
RD or
HALT
T
1
T
2
T
3
M1
T
1
T
4
NMI
HALT Instruction is repeated during this Memory Cycle
T
4
T
2
M1
CLK
HALT
T
1
T
2
T
3
T
1
T
4
M1
T
4
T
2
T
3