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General| CPU Family | eZ80 |
|---|---|
| Core | eZ80 |
| Architecture | 8-bit |
| Clock Speed | up to 50 MHz |
| Addressable Memory | 16 MB |
| Register Size | 8-bit |
| Serial Interfaces | UART, SPI, I2C |
| Operating Temperature | -40°C to +85°C |
| Instruction Set | Z80 compatible |
| On-Chip Flash Memory | Up to 256 KB |
| On-Chip SRAM | Up to 16 KB |
| Operating Voltage | 3.0V to 3.6V |
| Package Types | LQFP, QFP |
| Timers | Multiple timers/counters |
| Power Consumption | Low power |
Describes Z80-compatible addressing with 16-bit registers and default operating mode on reset.
Explains ADL mode utilizing 16MB linear addressing and 24-bit registers.
Details the two banks of working registers: main and alternate.
Lists registers controlling CPU operation: I, IX, IY, MBASE.
Details CPU registers and bit flags when operating in Z80 mode.
Details how the CPU accepts and responds to nonmaskable interrupts (NMIs).
Describes how the CPU responds to maskable interrupts using Interrupt Modes 0, 1, and 2.
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