eZ80
®
CPU
User Manual
UM007714-0908 Manual Objectives
vii
Interrupts
This chapter describes interrupt operation in maskable and nonmaskable mixed memory
modes.
Illegal Instruction Traps
This chapter describes the consequences of undefined operations.
I/O Space
This chapter describes input/output memory for on- and off-chip peripherals.
Addressing Modes
This chapter describes methods of accessing different addressing modes.
Mixed-Memory Mode Applications
This chapter describes the MADL control bit and mixed memory mode guidelines.
CPU Instruction Set
This chapter lists assembly language instructions, including mnemonic definitions and a
summary of the eZ80
®
CPU instruction set.
Opcode Maps
This chapter provides a detailed diagram of each opcode segment.
Related Documents
Manual Conventions
The following conventions are used to provide clarity in the document.
eZ80190 eZ80190 Product Specification PS0066
eZ80190 Module Product Specification PS0191
eZ80L92 eZ80L92 Product Specification PS0130
eZ80L92 Module Product Specification PS0170
eZ80F92 eZ80F92 Product Specification PS0153
eZ80F92 Ethernet Module Product Specification PS0186
eZ80F92 Flash Module Product Specification PS0189
eZ80F91 eZ80F91 Product Specification PS0192
eZ80F91 Module Product Specification PS0193
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