eZ80
®
CPU
User Manual
UM007714-0908 Illegal Instruction Traps
46
Illegal Instruction Traps
The eZ80
®
CPU instruction set does not cover all possible sequences of binary values.
Binary values and sequences for which no operation is defined are illegal instructions.
When an eZ80
®
processor fetches one of these illegal instructions, it performs a TRAP
operation.
While not a true eZ80
®
instruction, a TRAP operation functions similar to an
RST
00h
instruction. The function of the TRAP instruction is displayed in the following code
segment:
if ADL mode (ADL = 1) {
(SPL) ← PC[23:0]
if MIXED MEMORY mode (MADL = 1) {
(SPL) ← 03h
}
PC[23:0] ← 000000h
}
else Z80 mode (ADL = 0){
SPS ← PC[15:0]
if MIXED MEMORY mode (MADL = 1) {
(SPL) ← 02h
}
PC[15:0] ← 0000h
Effectively, PC[23:0] = {MBASE, PC[15:0]}.
The current program counter is pushed onto the stack (the stack is either SPL or SPS
depending upon the current memory mode). In addition, if the program code is written for
MIXED MEMORY mode (MADL = 1), the current memory mode information is also
pushed onto the stack.
The memory mode suffixes (
.SIS
,
.SIL
,
.LIS
, and
.LIL
) do not guarantee illegal instruc-
tion traps, even when used with instructions for which they have no meaning. For exam-
ple, preceding a Complement Carry Flag instruction (CCF) with an .SIS suffix of opcode
40h is allowed. The memory mode suffixes configure the CPU to act in a particular mem-
ory mode and fetch a particular number of bytes from the opcode stream, if necessary.
Because the CCF instruction is not affected by the current memory mode and does not
fetch any operands, there is no effect. The memory mode opcodes do not generate traps
because they do not push into secondary pages of the opcode tables, which may contain
undefined binary values.
Some products that employ the CPU can also contain a TRAP register for capturing the
illegal binary value. Refer to the eZ80
®
and eZ80Acclaim!
®
product specifications for
more information.
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