eZ80
®
CPU
User Manual
UM007714-0908 Memory Mode Switching
27
CALL.IL
Mmn
0 CALL.SIL
Mmn
assembles to
52 CD nn mm
MM
The starting program counter is {MBASE,
PC[15:0]}. Push the 2-byte logical return address,
PC[15:0], onto the SPL stack. Push a 02h byte
onto the SPL stack, indicating a call from Z80
mode (because ADL = 0). Set the ADL mode bit to
1. Load the 3-byte address {MM, mm, nn} from the
instruction into PC[23:0]. The ending program
counter is PC[23:0] = {MM, mm, nn}.
CALL.IL
Mmn
1 CALL.LIL
Mmn
assembles to
5B CD nn mm
MM
The starting program counter is PC[23:0]}. Push
the 3-byte return address, PC[23:0], onto the SPL
stack. Push a 03h byte onto the SPL stack,
indicating a call from ADL mode (because
ADL = 1). The ADL mode bit remains set to 1. Load
a 3-byte address {MM, mm, nn} from the
instruction into PC[23:0]. The ending program
counter is PC[23:0] = {MM, mm, nn}.
Table 15. JP Mmn Instruction
User Code
ADL
Mode
Assembled
Code Operation
JP mn 0 JP mn
assembles to
C3 nn mm
The starting program counter is {MBASE,
PC[15:0]}. Write the 2-byte immediate value {mm,
nn}, to PC[15:0]. The ADL mode bit remains
cleared to 0. The ending program counter is
{MBASE, PC[15:0]} = {MBASE, mm, nn}.
JP.SIS mn 0 JP.SIS mn
assembles to
40 C3 nn mm
This operation is the same as the previous
operation. The .SIS extension does not affect
operation when beginning in Z80 mode.
JP.LIL Mmn 0 JP.LIL mn
assembles to
5B C3 nn mm
The starting program counter is {MBASE,
PC[15:0]}. Write the 3-byte immediate value {MM,
mm, nn}, to PC[23:0]. Set the ADL mode bit to 1.
The ending program counter is PC[23:0] = {MM,
mm, nn}.
JP.SIL
Mmn
0 N/A An illegal suffix for this instruction.
JP.LIS mn 0 N/A An illegal suffix for this instruction.
Table 14. CALL Mmn Instruction (Continued)
User Code
ADL
Mode
Assembled
Code Operation
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