ZiLOG eZ80 User Manual (English)

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eZ80

CPU

User Manual

UM007714-0908 Memory Mode Switching

The memory mode can be changed by adding a suffix to a CALL, JP, RST, or RET,

RETI, or, RETN instruction. Tables 14 through 20 describe how each of these 4 instruc-

tions function. The individual instructions may perform additional operations that are not

described here. These tables are focused only on the memory mode switching. For more

detailed information, see eZ80

CPU Instruction Set Description on page 77.

Table 14. CALL Mmn Instruction

User Code

ADL

Mode

Assembled

Code Operation

CALL mn 0 CALL mn

assembles to

CD nn mm

The starting program counter is {MBASE,

PC[15:0]}. Push the 2-byte return address

PC[15:0] onto the SPS stack. The ADL mode bit

remains cleared to 0. Load 2-byte logical address

{mm, nn} from the instruction into PC[15:0]. The

ending program counter is {MBASE,

PC[15:0]} = {MBASE, mm, nn}.

CALL Mmn 1 CALL Mmn

assembles to

CD nn mm MM

The starting program counter is PC[23:0]. Push the

3-byte return address PC[23:0] onto the SPL

stack. The ADL mode bit remains set to 1. Load 3-

byte address {MM, mm, nn} from the instruction

into PC[23:0]. The ending program counter is

PC[23:0] = {MM, mm, nn}.

CALL.IS

0 CALL.SIS mn

assembles to

40 CD nn mm

The starting program counter is {MBASE,

PC[15:0]}. Push the 2-byte logical return address

PC[15:0] onto the {MBASE, SPS} stack. Push a

02h byte onto the SPL stack, indicating a call from

Z80 mode, (because ADL = 0). The ADL mode bit

remains cleared to 0. Load 2-byte logical address

{mm, nn} from the instruction into PC[15:0]. The

ending program counter is {MBASE, PC[15:0]}.

CALL.IS

1 CALL.LIS mn

assembles to

49 CD nn mm

The starting program counter is PC[23:0]. Push the

2 LS bytes of the return address, PC[15:0], onto

the {MBASE, SPS} stack. Push the MS byte of the

return address, PC[23:16], onto the SPL stack.

Push a 03h byte onto the SPL stack, indicating a

call from ADL mode (because ADL = 1). Reset the

ADL mode bit to 0. Load 2-byte logical address

{mm, nn} from the instruction into PC[15:0]. The

ending program counter is {MBASE,

PC[15:0]} = {MBASE, mm, nn}.

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ZiLOG eZ80 Specifications

General

CPU Family	eZ80
Core	eZ80
Architecture	8-bit
Clock Speed	up to 50 MHz
Addressable Memory	16 MB
Register Size	8-bit
Serial Interfaces	UART, SPI, I2C
Operating Temperature	-40°C to +85°C
Instruction Set	Z80 compatible
On-Chip Flash Memory	Up to 256 KB
On-Chip SRAM	Up to 16 KB
Operating Voltage	3.0V to 3.6V
Package Types	LQFP, QFP
Timers	Multiple timers/counters
Power Consumption	Low power