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Abov MC96FM204 - Page 4

Abov MC96FM204
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MC96FM204/FM214
4 April 7, 2016 Ver. 1.8
10.3 Block Diagram .......................................................................................................................................... 66
10.4 Interrupt Vector Table ............................................................................................................................... 67
10.5 Interrupt Sequence ................................................................................................................................... 67
10.6 Effective Timing after Controlling Interrupt Bit .......................................................................................... 69
10.7 Multi Interrupt ........................................................................................................................................... 70
10.8 Interrupt Enable Accept Timing ................................................................................................................ 71
10.9 Interrupt Service Routine Address ............................................................................................................ 71
10.10 Saving/Restore General-Purpose Registers ........................................................................................... 71
10.11 Interrupt Timing ...................................................................................................................................... 72
10.12 Interrupt Register Overview .................................................................................................................... 72
10.13 Interrupt Register Description ................................................................................................................. 74
11. Peripheral Hardware ....................................................................................................................................... 79
11.1 Clock Generator ....................................................................................................................................... 79
11.2 Basic Interval Timer .................................................................................................................................. 82
11.3 Watch Dog Timer ..................................................................................................................................... 84
11.4 Timer 0 ..................................................................................................................................................... 87
11.5 Timer 1 ..................................................................................................................................................... 92
11.6 Timer 2 ................................................................................................................................................... 102
11.7 Buzzer Driver .......................................................................................................................................... 112
11.8 SPI ......................................................................................................................................................... 114
11.9 8-Bit A/D Converter ................................................................................................................................ 120
11.10 Analog Comparator .............................................................................................................................. 125
11.11 Operational Amplifier ............................................................................................................................ 127
12. Power Down Operation ................................................................................................................................. 129
12.1 Overview ................................................................................................................................................ 129
12.2 Peripheral Operation in IDLE/STOP Mode ............................................................................................. 129
12.3 IDLE Mode ............................................................................................................................................. 130
12.4 STOP Mode ............................................................................................................................................ 131
12.5 Release Operation of STOP Mode ......................................................................................................... 132
13. RESET .......................................................................................................................................................... 134
13.1 Overview ................................................................................................................................................ 134
13.2 Reset Source .......................................................................................................................................... 134
13.3 RESET Block Diagram ........................................................................................................................... 134
13.4 RESET Noise Canceller ......................................................................................................................... 135
13.5 Power On RESET .................................................................................................................................. 135
13.6 External RESETB Input .......................................................................................................................... 138
13.7 Brown Out Detector Processor ............................................................................................................... 139
13.8 LVI Block Diagram .................................................................................................................................. 140
14. On-chip Debug System ................................................................................................................................. 144
14.1 Overview ................................................................................................................................................ 144
14.2 Two-Pin External Interface ..................................................................................................................... 145
15. Flash Memory ............................................................................................................................................... 150
15.1 Overview ................................................................................................................................................ 150
16. Configure Option ........................................................................................................................................... 164
16.1 Configure Option Control ........................................................................................................................ 164
17. APPENDIX .................................................................................................................................................... 165
List of Figures
Figure 1.1 OCD Debugger and Pin Description ...................................................................................... 12

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