Acer G185H - Page 35

SPEC NO.
M T1 8 5GW 0 1 V. 0
PAGE
12/23
c. Input signal timing
Support Input Timing Table
Item Description Min. Typ. Max. Unit
period 10.5 13.2 15.9 nS Clock
Dclk
frequency 62.9 75.4 95.6 MHz
T
V_TOTAL
V total line number 786 806 900 T
H_TOTAL
T
V_DATA
Data duration
－
768
－
T
H_TOTAL
T
VB
V-blank 18 38 132 T
H_TOTAL
Vertical
f
V
frequency 50 60 76 Hz
T
H_TOTAL
H total pixel number 1400 1560 1800 DClk
T
H_DATA
Data duration
－
1366
－
DClk
Horizontal
T
HB
H-blank 40 194 434 DClk
Note: Because this module is operated by DE only mode, Hsync and Vsync input signals should be set
to low Logic level or ground. Otherwise, this module would operate abnormally.
DATA