6 AMD “RICHLAND” APU | HOT CHIPS 25 | PRAVEEN DONGARA | AUGUST 2013
BUILDING BLOCKS OF AMD TURBO CORE TECHNOLOGY
THERMAL ENTITIES
• 3 main thermal entities (TE)
• TE1: 1
st
x86 module + L2
• TE2: 2
nd
x86 module + L2
• TE3: Graphics + Northbridge + Multimedia
• On each TE
• Power and Temperature tracked
• Frequency and Voltage controlled
• Also account for I/O power influence on each of
the other TEs
"Richland" incorporates:
• Two “Piledriver” high-performance
x86 modules (core-pairs)
• 2-MB shared L2 cache per x86
module
• AMD Radeon™ HD 8000 series
DirectX®11-capable GPU with six
compute units
• Next-generation media acceleration
technology
• Dual 64-bit memory channel
supporting up to DDR3-2133
• Integrated DisplayPort 1.2 interfaces
• PCI Express® I/O Generation 2
interfaces
"Richland" is implemented in a 32-nm
SOI node2+ high-K metal gate process
technology