Apple Lisa - Status Register

Confidential
Lisa Hardware Reference Manual
7-Jul-81
THE STATUS REGISTER
The status register permits a program to read the status of the
system bus. A Bus Error exception routine can read this register to
determine the cause of the Bus Error. The register is located at
$OOF800 in I/O space. It can only be read. Its bits have the
following meanings:
Bit
o
1
2
3
4
5
STATUS REGISTER BITS
Name
Soft Error
Hard Error
Vertical Retrace
Bus Timeout
Video
Bit
Horizontal Sync
Meaning
A
soft error has occurred (bit=O)
A hard error has occurred (bit-O)
The video circuit has begun a vertical
retrace if this bit is a O. When this
bit is set, an interrupt is generated.
The interrupt routine should reset this
bit just before it returns because the
video circuit continues to set this bit
for two scan lines after the start of the
retrace (about 90 uS). The. Enable Vertical
Retrace'Interrupt bit can be set to mask
the interrupt and prevent this bit from
being set.
A bus timeout has occurred (bit=O). A
timer insures that the 68000 does not
hold Address Strobe (AS/) low longer than
50 uS to keep the system from being hung
by
an attempt to access a nonexistent
peripheral device. Whenever the timer
detects that AS/ has been low for more
than 50 uS, a Bus Error is generated and
the Bus Timeout bit is set in the system
status register.
This bit permits the CPU to read the output
of the video circuit for diagnostic purposes.
If the Video Bit is 1, the video output is
a bright spot on the screen.
This bit permits the CPU to read the state
of the horizontal sync Signal for diagnostic
purposes. When the bit is 1, the display
is in a horizontal retrace.
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