Apple Lisa - Page 19

Confidential Lisa Hardware Reference Manual
7-Jul-81
The test function performed depends on the type of memory board in use.
On a parity memory board, the parity detection circuitry can be tested
by the following steps:
1. Assert the Hard Error line (set DIAG2)
2. Write to memory
3 • Clear D IAG2
4. Enable Hard Error
At this point a read from the memory board should generate a parity error.
Since the Hard and Soft error status latches are set in this mode, the
Hard and Soft error masks should also be set.
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