Apple Lisa - Page 54

Confidential
Lisa Hardware Reference Manual
BOO - BD1S The 16 Buffered Data lines are the system data
bus. These data lines are bidirectional and
are pulled up on the motherboard.
BAl - BA12 The 12 Buffered Address lines select one of
2048 words in both the Low and High Selects.
Each I/O card, therefore, has a maximum of
4096 words (8192 bytes) of addressability.
The Buffered Address lines are the 12 low
address lines generated after the MHO. Thus,
the operating system can assign a process a
segment that encloses the 8192 addressable
bytes on the I/O card, and the process will
address the I/O card from addresses $0 to $1FFF
independent of the location of the slot.
AS/ Address Strobe indicates that the 68000 has
initiated a memory cycle. Due to memory map
delay, the high 3 address bits may not be
valid when the address strobe is asserted,
but the low 8 bits are valid.
ODS/ Upper Data Strobe indicates that the memory
cycle being performed affects the upper data
byte (BD8 - BDlS).
LOS/ Lower Data Strobe indicates that the memory
cycle being performed affects the lower data
byte (BDO - BD7).
DTACK/ Data Transfer Acknowledge indicates that the
I/O device has performed the data transfer
requested by the 68000, and that the cycle
can complete.
READ READ indicates the direction of the data transfer
on the Buffered Data lines. When READ is high,
7-Jul-8l'
data goes from the I/O device to the 68000. When
READ is low, data goes from the 68000 to the device.
VPA/ Valid Peripheral Address indicates to the 68000
that the addressed device works with a 6800 bus
cycle. MACK/ must not be asserted if VPA/ is
asserted.
VMA/ Valid Memory Address indicates that the 68000 has
received the VPA and is executing the requested
6800 cycle.
E E is the 68000 equivalent of the 6800 phi2 clock.
E is high for 4 clock cycles and low for 6 cycles.
The frequency of the E clock is therefore 500 KHz.
Page 54