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Arcam DiVA CD72 - Page 17

Arcam DiVA CD72
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1 2 3 4 5 6 7 8
A
B
C
D
87654321
D
C
B
A
ISSUE
DRAWING NO.
DRAWING TITLE
Drawn by:
DATE
Filename
ECO No. DESCRIPTION OF CHANGE
J:\PROJECTS\A9 CD\L816PB DAC PCB\Circuits & PCB\Issue 5\L816c1 5.DDB - Documents\L816C2 .SCH
A & R Cambridge Ltd.
Pembroke Avenue
Denny Industrial Centre
Waterbeach
Cambridge CB5 9PB
Alpha 9 CD DAC DRIVER
Circuit Diagram
L816CT
SJB
15-Oct-1999
INITIALS
Date Printed
2 9Sheet of
Notes:
VSS1
1
VSS2
2
IO1
3
IO2/A0
4
IO3
5
IO4
6
IO5/A1
7
IO6/A2
8
IO7
9
IO8
10
IO9/A3
11
VDD1
12
IO10
13
IO11
14
IO12
15
IO13/A4
16
IO14/A5
17
IO15
18
IO16
19
IO17/A6
20
VSS3
21
IO18
22
IO19
23
IO20
24
IO21/A7
25
VDD2
26
IO22
27
IO23
28
IO24
29
IO25/A8
30
VSS4
31
IO26/A9
32
IO27
33
IO28
34
IO29/A10
35
IO30
36
IO31
37
IO32
38
IO33/A11
39
VDD3
40
IO34/A12
41
IO35
42
IO36
43
IO37/A13
44
IO38
45
IO39/A14
46
IO40
47
IO41
48
IO42
49
IO43/A15
50
VSS5
51
CCLK
52
VSS6
53
VSS7
54
IO44/A16
55
IO45
56
IO46
57
IO47
58
IO48/A17
59
IO49
60
IO50
61
IO51
62
IO52
63
IO53
64
VDD4
65
IO54
66
IO55
67
IO56
68
IO57
69
IO58
70
IO59
71
IO60
72
IO61
73
VSS8
74
IO62
75
IO63
76
IO64
77
IO65
78
VSS9
79
IO66
80
IO67
81
IO68
82
IO69
83
VSS10
84
IO70
85
IO71
86
IO72
87
IO73
88
IO74/HDC
89
IO75
90
IO76
91
IO77
92
VDD5
93
IO78/LDC
94
IO79
95
IO80
96
IO81
97
IO82/INIT
98
IO83
99
IO84
100
IO85
101
IO86
102
VSS11
103
DONE
104
VSS12
105
RESET
106
PGRM
107
IO87/M0
108
IO88
109
IO89
110
IO90
111
IO91/M1
112
IO92
113
IO93
114
IO94
115
VDD6
116
IO95/M2
117
IO96
118
IO97
119
IO98
120
IO99/M3
121
IO100
122
IO101
123
IO102
124
VSS13
125
IO103
126
IO104
127
IO105
128
IO106
129
VDD7
130
IO107
131
IO108
132
IO109
133
IO110
134
VSS14
135
IO111
136
IO112
137
IO113
138
IO114
139
IO115/CS1
140
IO116
141
IO117
142
IO118
143
VDD8
144
IO119/CS0
145
IO120
146
IO121
147
IO122
148
IO123/RD
149
IO124
150
IO125
151
IO126/WR
152
IO127
153
IO128
154
VSS15
155
RD/CF
156
VSS16
157
VSS17
158
IO130/RCLK
160
IO131
161
IO132
162
IO133/D7
163
IO134
164
IO135
165
IO136
166
IO137/D6
167
VDD9
168
IO138
169
IO139
170
IO140
171
IO141/D5
172
IO142
173
IO129
159
IO143
174
IO144
175
IO145/D4
176
VSS18
177
IO146
178
IO147
179
IO148
180
IO149/D3
181
VSS19
182
IO150
183
IO151
184
IO152
185
IO153/D2
186
VSS20
187
IO154/D1
188
IO155
189
IO156
190
IO157/D0
191
IO158
192
IO159
193
IO160
194
IO161/DOUT
195
VDD10
196
IO162
197
IO163
198
IO164
199
IO165/TDI
200
IO166
201
IO167/TMS
202
IO168
203
IO169
204
IO170
205
IO171/TCK
206
VSS21
207
RD_DT
208
U11
ATT2C002
C49
10N SM
C91
10N SM
A15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
D23
D22
D11
D12
D13
D14
D15
D16
D17
D18
D19
D0
D1
D2
D3
D4
D5
D6
D7
D9
D10
MODE0
MODE1
VCCD
DGND
CCLK
DOR
DOL
WCKO
BCKO
WR
MRESET must be tied LOW
DSP
SER CLK
SER_DIN
SER_CH
MODE0
D[0..23]
SEL[0..2]
RDYO
SRD
SCK
INTR
A[0..15]
L[0..15]
R[0..15]
CLK
PRGM
M0 M2
DONE
MODE1
MODE0
MODE1
VCCD
BCKO
WCKO
DOL
DOR
CCLK
WR
DSP
SER_CLK
SER_DIN
SER_CH
DONE
PRGM
M0
M2
CLK17M
RDYO
INTR
SCK
SRD
VFPGA
VFPGA
LDC
LDC
L[0..15]
R[0..15]
SEL[0..2]
A[0..15]
D[0. 23]
D21
D20
D8
SEL0
SEL1
SEL2
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
L0
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
R53
15K SM
R48
15K SM
R47
15K SM
A/D
NMODE
PMODE
A/D
NMODE
PMODE
MUTE
HDCD
SER_CH2
SER_CH2
C92
10N SM
C45
10N SM
R41
10R SM
Q_11
Q_10
Q_1
Q_5
Q_8
Q_14
Q_15
Q_16
Q_13
Q_12
Q_4
Q_3
Q_2
Q_9
Q_7
Q_6
1
1st Issue
21-APR-98
SJB
98_1020
2No Change on this sheet
13-May-98
SJB
98_1022
3No Change on this sheet
21-Sept-98
SJB
98_1058
4No Change on this sheet
02-Nov-98
LJW
98_1067
+
C89
100U 25V ZA EL
L6
33UH 2A RA
5C89VALUE CHANGE
14-10-99
WAF
99_1072
A8
A9
A10
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA0
AA1
AA2
AA4
AA5
AA6
AA7
AA3

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