5.1 J1 Pin Connector
Pin Function Type Description
1 D0/LPIO0 Digital Digital IO 0 / Low Power IO Pin 0
2 A2/D18 Analog Analog Input 2 / Digital IO 18
3 SS Digital SPI Slave Select
4 COPI Digital SPI Controller Out / Peripheral In
5 CIPO Digital SPI Controller In / Peripheral Out
6 SCK Digital SPI Clock
7 A1/D17 Analog Analog Input 1 / Digital IO 17
8 A0/D16 Analog Analog Input 0 / Digital IO 16
5.2 J2 Pin Header
Pin Function Type Description
1 SDA Digital I2C Data Line
2 SCL Digital I2C Clock
3 D1/LPIO1/UART_TX Digital Digital IO 1 / Low Power IO Pin 1 / Serial Transmission Pin
4 D2/LPIO2/UART_RX Digital Digital IO 2 / Low Power IO Pin 2 / Serial Reception Pin
5 D3/LPIO3 Digital Digital IO 3 / Low Power IO Pin 3
6 GND Power Ground
7 VDDIO_EXT Digital Logic Level Reference
8 N/C N/A N/A
9 VIN Digital Input Voltage
Note: For further information on how Low Power I/Os work, check Nicla Family Form Factor documentation.
5.3 J2 Fins
Pin Function Type Description
P1 SDA_PMIC Digital PMIC I2C Data Line
P2 SCL_PMIC Digital PMIC I2C Clock Line
P3 TDO/SWD Digital Data SWD JTAG Interface
P4 TCK/SCK Digital Clock of SWD JTAG
P5 TMS/NRST Digital Reset Pin
P6 SWO Digital Output of SWD JTAG Interface
P7 +1V8 Power +1.8V Voltage Rail
P8 VOTP_PMIC Digital Reserved