ASROCK H81M-ITX - Page 70

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tWRRDDR
Congure between module write to read delay from dierent ranks.
tWRRDDD
Use this to change DRAM tRRSR Auto/Manual settings. e default is [Auto].
Congure between module write to read delay from dierent DIMMs.
tWRWR
Congure between module write to write delay.
tWRWRDR
Congure between module write to write delay from dierent ranks.
tWRWRDD
Congure between module write to write delay from dierent DIMMs.
tRDWR
Congure between module read to write delay.
tRDWRDR
Congure between module read to write delay from dierent ranks.
tRDWRDD
Congure between module read to write delay from dierent DIMMs.
RTL (CHA)
Congure round trip latency for channel A.
RTL (CHB)
Congure round trip latency for channel B.
IO-L (CHA)
Congure IO latency for channel A.
IO-L (CHB)
Congure IO latency for channel B.
ODT WR (CHA)
Congure the memory on die termination resistors' WR for channel A.