ASROCK H81M-ITX - Page 71

H81M-ITX/WiFi
67
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ODT WR (CHB)
Congure the memory on die termination resistors' WR for channel B.
ODT NOM (CHA)
Use this to change ODT (CHA) Auto/Manual settings. e default is [Auto].
ODT NOM (CHB)
Use this to change ODT (CHB) Auto/Manual settings. e default is [Auto].
Command Tri State
Enable for DRAM power saving.
MRC Fast Boot
Enable Memory Fast Boot to skip DRAM memory training for booting faster.
DIMM Exit Mode
Select Slow Exit to reduce power consumption, or Fast Exit for better performance.
FIVR Conguration
FIVR Switch Frequency Signature
Select whether to boost or lower the FIVR Switch Frequency.
FIVR Switch Frequency Oset
Congure the percentage of frequency boost or deduction.
Vcore Override Voltage
Congure the voltage added to the Vcore when the system is under heavy load.
Vcore Voltage Additional Oset
Congure the dynamic Vcore voltage added to the Vcore.
CPU Cache Override Voltage
Add voltage to the CPU Cache when the system is under heavy load.
CPU Cache Voltage Oset
Congure the voltage for the CPU Cache. Setting the voltage higher may increase
system stability when overclocking.