Atari ST series - Page 310

APPENDIX F
Jdisint(), Jenabint() and Mfpint(). The MFP registers, and
their functions, are:
Register 1. General Purpose I/O Interrupt Port (GPIP).
This is the data register for the 8-bit parallel I/O port, where
the data is read and written.
Register 2. Active Edge Register (AER). For parallel port
input bits. This register specifies whether the interrupt will
occur on low-to-high transitions (1), or high-to-low transi
tions (0).
Register 3. Data Direction Register (DDR). This register
specifies whether each bit of the parallel I/O port will be
used for input (0), or output (1).
Register 4. Interrupt Enable Register A (IERA). Each bit
of this register is used to determine whether the correspond
ing interrupt will be enabled (1), or disabled (0). These are
detailed in Table F-l. The interrupts that have an asterisk
next to their priority level are initially disabled.
Table F-l. Interrupt Disable Register A (IERA)
Bit
Internal
Priority Interrupt
imber
Level
Source
Function
7
15* I/O Port Bit 7
Monochrome monitor detect
6 14*
I/O Port Bit 6
RS-232 Ring Indicator (RI)
5
13* Timer A
User-defined timer interrupt
4 12
USART
RS-232 receive buffer full
3 11
USART RS-232 receive error
2
10 USART RS-232 transmit buffer empty
1
9
USART RS-232 transmit error
0 8* Timer B
Horizontal blank counter
Register 5. Interrupt Enable Register B (IERB). Each bit
of this register is used to determine whether the correspond
ing interrupt will be enabled (1), or disabled (0). The inter
rupts that have an asterisk next to their priority level are ini
tially disabled.
Table F-2. Interrupt Enable Register B (IERB)
Internal
Bit Priority Interrupt
Number Level Source Function
7 7* I/O Port Bit 5 Floppy drive/DMA port
data request
6 6 I/O Port Bit 4 Keyboard and MIDI
ACIA data request