Automation Direct CTT-1C-D24 - Page 46

Digital Counter / Timer / Tach User Manual, 1st Ed.
2-33
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2-Stage Counting (
StA6E 2
)
In 2-Stage Counting, count setting value SV1 controls Output 1 and count setting value SV2 controls Output 2.
Output 1 will turn ON momentarily for the time set in the output pulse width parameter (
tout1
) or will be main-
tained ON (
tout1
set to 0.00). Output 2 will turn ON momentarily for the time set in the output pulse width
parameter (
tout2
) or will be maintained ON depending on the output mode selected.
CTT Counter Functions
2-Stage Counting (StA6E 2)
Counting Down (down)
Counting Down (
down
)
With the input signal OFF at input CP2, each leading edge of
the input signal at CP1 will decrement the count present value
PV by 1. Turning ON the input signal at CP2, will prohibit
the input signal at CP1 from decrementing the PV.
Input Mode:
Mode F (
F
)
When the count present value PV counts down to the count
setting value SV1, Output 1 will turn ON momentarily for the
time set in the output pulse width parameter (tout1) or will be
maintained ON if the output pulse width parameter (
tout1
)
is set to 0.00. When the count PV counts down to 0, Output 2
will turn ON. The count PV will continue to decrement with
each input signal.
The leading edge of a “reset” input signal at RST1 will turn
OFF both outputs, reset the count PV to the count SV2, and
prohibit an input signal from decrementing the count PV. The
trailing edge of the “reset” signal at RST1 enables counting to
begin.
The “reset” signal minimum pulse width is set by reset pulse
width parameter (
rtSr
) or DIP Switch 8.
Output Modes:
With the input signal ON at input CP1, each trailing edge of
the input signal at CP2 will decrement the count present value
PV by 1. Turning OFF the input signal at CP1, will prohibit
the input signal at CP2 from decrementing the PV.
T1
T1
999999
RESET
SV2
SV1
OUT2
OUT1
Stage 2
Input Mode DOWN
Output Mode F
Note: T1 momentary ON time set in output
pulse parameter (tout1), setting tout1=0.00
results in output 1 maintained ON.
PV
0
A
Prohibit
A
n
n-1
n-2
n-3
n-4
n-5
H
L
H
L
CP1
CP2
0
Present
Value
CP1: Counter input prohibited CP2: Counter input
Note: has to be larger than width of min. Input signal
A
Counting down
Prohibit
A
A
n
n-2
n-1
n-4
n-3
H
L
CP1
CP2
Present
Value
0
H
L
CP1: Counter input CP2: Counter input prohibited
Note: has to be larger than width of min. Input signal
A