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Automation Direct CTT-1C-D24 - Page 77

Automation Direct CTT-1C-D24
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Digital Counter / Timer / Tach User Manual, 1st Ed.
1-800-633-0405
2-64
Batch Counting (
bAtCH
)
In Batch Counting, count setting value SV controls Output 2 which will turn ON momentarily for the time set in
the output pulse width parameter (tout2) or will be maintained ON depending on the output mode selected. Count
setting value BATCH SV controls Output 1which will be maintained ON.
CTT Counter Functions
Batch Counting (batCH)
Counting Down (down)
Counting Down (
down
)
With the input signal OFF at input CP2, each leading edge of the
input signal at CP1 will decrement the count present value PV by
1. Turning ON the input signal at CP2, will prohibit the input
signal at CP1 from decrementing the PV.
Input Mode:
Mode F (
F
)
When the count present value PV counts down to 0, Output 2
will turn ON and the batch count present value BATCH PV
will increment by one. The count PV will continue to decre-
ment with each input signal.
The leading edge of a “reset” input signal at RST1 will turn
OFF Output 2, reset the count PV to the count setting value
SV, and prohibit an input signal from decrementing the count
PV. The trailing edge of the “reset” signal at RST1 enables
counting to begin.
When the BATCH PV counts up to the BATCH SV, Output
1 will turn ON. The leading edge of a “reset” input signal at
RST2 will turn OFF Output 1, reset the BATCH PV to 0, and
prohibit an input signal from incrementing the BATCH PV.
The trailing edge of the “reset” signal at RST2 enables counting
to begin.
The “reset” signal minimum pulse width is set by reset pulse
width parameter (
rtSr
) or DIP Switch 8.
Output Modes:
With the input signal ON at input CP1, each trailing edge of the
input signal at CP2 will decrement the count present value PV by
1. Turning OFF the input signal at CP1, will prohibit the input
signal at CP2 from decrementing the PV.
RST2
RESET
BATCH PV
OUT1
BATCH SV=2
999999
RST1
RESET
COUNT SV
COUNT PV
OUT2
BATCH
Input Mode DOWN
Output Mode F
0
A
Prohibit
A
n
n-1
n-2
n-3
n-4
n-5
H
L
H
L
CP1
CP2
0
Present
Value
CP1: Counter input prohibited CP2: Counter input
Note: has to be larger than width of min. Input signal
A
Counting down
Prohibit
A
A
n
n-2
n-1
n-4
n-3
H
L
CP1
CP2
Present
Value
0
H
L
CP1: Counter input CP2: Counter input prohibited
Note: has to be larger than width of min. Input signal
A