TA770 A2+ SE BIOS Manual
37
Integrated Memory Test
Integrated Memory Test allows users to test memory module compatibilities without
additional device or software.
Step 1:
This item is disabled on default; change it to “ Enable” to precede memory test.
BIOS SETUP UTILITY
Main Advanced PCIPnP Boot Chipset T-Series
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit
+-
F1
F10
ESC
T-Series Settings
WARNING: Setting wrong values in below sections
may cause system to malf unction.
=========== Automate OverClock Sy stem ===========
============ Manual OverClock Sys tem ============
OverClock Navigator [Nor mal]
Auto OverClock System [V6- Tech Engine]
CPU Over Voltage [Sta rtUp]
Memory Over Voltage [1.9 5V]
Chipset Over Voltage [1.1 5V]
HT Over Voltage [1.2 0V]
CPU Frequency [200 ]
> CPU FID/VID Control
> Memory Configuration
> DRAM Timing Configuration
> Hyper Transport Configuration
Integrated Memory Test [Ena bled]
Exit
Options
Enabled
Disabled
Step 2:
When the process is done, change the setting back from “Enabled” to “Disabled” to
complete the test.
BIOS SETUP UTILITY
Main Advanced PCIPnP Boot Chipset T-Series
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit
+-
F1
F10
ESC
T-Series Settings
WARNING: Setting wrong values in below sections
may cause system to malf unction.
=========== Automate OverClock Sy stem ===========
============ Manual OverClock Sys tem ============
OverClock Navigator [Nor mal]
Auto OverClock System [V6- Tech Engine]
CPU Over Voltage [Sta rtUp]
Memory Over Voltage [1.9 5V]
Chipset Over Voltage [1.1 5V]
HT Over Voltage [1.2 0V]
CPU Frequency [200 ]
> CPU FID/VID Control
> Memory Configuration
> DRAM Timing Configuration
> Hyper Transport Configuration
Integrated Memory Test [Dis abled]
Exit
Options
Enabled
Disabled
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