13
4. Reflected, delivered, and forward power can be monitored remotely through Pins 24(+) & 11(-), 23(+)
& 10(-), and 25(+), 12(-) respectively. All of these balanced analog outputs are 0 to 10 VDC linearly
corresponding to 0 to 5000 watts of RF power.
5. An overtemp condition as stated in #8 above in LOCAL will also result in the 'closure' of the
OVERTEMP DIGITAL OUTPUT, Pins 20(collector) and 7(emitter) of the rear panel connector. The
digital output opto-isolator will be turned on.
6. When RF is present at the RF output connector, the POWER DELIVERED DIGITAL OUTPUT, Pins
19(collector) and 6(emitter), will also be turned on.
7. When Maximum RF output power (over 5100 watts) is present at the RF output connector, the MAX
POWER DIGITAL OUTPUT, Pins 21(collector) and 8(emitter), will also be turned on.
VII. Theory of Operation
The CLF5000/PLL is a low frequency power amplifier for use in OEM applications. The power source consists of
DC power supplies, a pulse width modulating - voltage controlled oscillator, four - 1250 Watt push-pull power
amplifiers running in parallel, and associated control systems and monitoring circuits. The main power DC supply
and current monitor reside in a separate compartment in the bottom half of the unit with all other components in the
top half.
The radio frequency signal is generated locally on the front panel CLF controller. From this assembly, the signal is
split four ways and goes to four LF1250 power amplifiers (PAs). The output of these four power amplifiers are
combined in parallel and matched to 50 ohms through a 6 pole low-pass filter. Control signals are obtained from the
output signal as it passes through the power monitor board to the RF output connector. The front panel CLF
Controller monitors the user input from either the front panel or rear connector, and monitors the control signals
from the RF output power monitor, PA voltage sensors, PA current monitor, and PA overtemp switch. Refer to
FP1541RX, CLF5000/PLL BLOCK DIAGRAM to see how the individual modules are connected together.
A. Interlock System
Refer to the “Safety Information” section of this manual for a detailed description of the interlocks.
B. DC Power Supplies
There are four DC supplies in the CLF5000/PLL RF generator. The primary RF power DC supply consists
of a 3-phase transformer T2, 3-phase full-wave bridge rectifiers BR1 & BR2 and a low-pass filter C1, C2,
& C3. Low voltage control power is produced by three single-phase bridge rectifiers BR1, BR2, & BR3
(see Fig. FA0302RX), filters C1, C3, & C5, and regulators VR2, VR3. This provides positive 15 volt,
negative 15 volt (respectively) sources for the front panel control assembly (FA0600RX) and a 12 volt
source (VR1 & VR4) for the RF power amplifier (FA0003RX) gate drive circuits.
The outputs of the DC supplies are:
1 44 VDC Unregulated Unloaded
37 VDC Unregulated 200 amps (@5000W RF output)
1 +15 VDC Regulated 250 mA max
1 -15 VDC Regulated 250 mA max
1 +12 VDC Regulated 1A max
The high current required by the RF power amplifiers (PAs) is monitored by the HALL EFFECT
CURRENT MONITOR PCB (Figure FA0509) mounted in the bottom half of the unit. This PCB uses four
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